Abstract: The present invention relates to a gas distributing injector applied in MOCVD reactor. The gas distributing injector comprises at least one gas distributing layer for distributing different gases. The distributing layer is a single-layered structure. The distributing layer comprises a disk-shaped body, a plurality of first gas channels, a plurality of second gas channels, and a plurality of third gas channels. The first gas channels, the second gas channels, and the third gas channels are radially distributed on the same plane in the disk-shaped body. Different gases are distributed or fed into different gas channels (such as the first gas channels, the second gas channels, and the third gas channels) and transported by different gas channels. Through different gas channels, different gases are transversely injected into the MOCVD reactor on the same plane respectively. Therefore, the gas distributing injector of this invention can distribute different gases by a single-layered structure.

Abstract: The present invention is directed to a fabrication method of a semiconductor multilayer structure. By utilizing the indium-containing catalyst and/or gallium-containing catalyst, the aluminum migration can be enhanced to increase quality and flatness of the aluminum contained nitride buffer layer. Furthermore, the costs and energy consumption can be reduced too.

Abstract: A vapor deposition system and its wafer and thin-film temperature control method are disclosed. A susceptor carries a plurality of wafer holders with each bearing a wafer. The susceptor makes revolution around a center axle and each wafer holder rotates around its own axis. A carrier gas approaches a first surface of the wafer and is heated to form a thin film to be deposited on the first surface. An isothermal plate is placed at a second surface of the wafer and the second surface is opposite to the first surface. One or more remote temperature-measuring elements measure a temperature of a rear surface of the isothermal plate and the rear surface is opposite to the wafer, and a wafer-side temperature is calculated by the measured rear surface temperature of the isothermal plate.

Abstract: A system for manufacturing semiconductor epitaxy structure includes a deposition apparatus, a curvature monitor system and a control unit. The deposition apparatus is configured for sequentially depositing a buffer layer, a first epitaxy layer, an insertion layer, a second epitaxy layer on a substrate. The curvature monitor system is configured for monitoring a curvature value of the semiconductor epitaxy structure. The control unit is configured for controlling the deposition apparatus to stop depositing the buffer layer, the first epitaxy layer, the insertion layer and the second epitaxy layer according to the curvature value of the semiconductor epitaxy structure measured by the curvature monitor system. The above-mentioned system for manufacturing semiconductor epitaxy structure is able to effectively control the strain of the semiconductor epitaxy structure during growth. A method for manufacturing semiconductor epitaxy structure is also disclosed.

Abstract: Apparatus and method for curvature and thin film stress measurement are disclosed. The apparatus comprises two light sources and a detector. Two light beams from the two light sources with an angle are not parallel. The two light beams are collimated and projected onto a specimen with a pitch. The detector receives the light beams reflected from the specimen. The curvature of the specimen is calculated via a distance between spots of the light beams on the detector or a size variation of one of the spots.

Abstract: A system for manufacturing semiconductor epitaxy structure includes a deposition apparatus, a curvature monitor system and a control unit. The deposition apparatus is configured for sequentially depositing a buffer layer, a first epitaxy layer, an insertion layer, a second epitaxy layer on a substrate. The curvature monitor system is configured for monitoring a curvature value of the semiconductor epitaxy structure. The control unit is configured for controlling the deposition apparatus to stop depositing the buffer layer, the first epitaxy layer, the insertion layer and the second epitaxy layer according to the curvature value of the semiconductor epitaxy structure measured by the curvature monitor system. The above-mentioned system for manufacturing semiconductor epitaxy structure is able to effectively control the strain of the semiconductor epitaxy structure during growth. A method for manufacturing semiconductor epitaxy structure is also disclosed.

Abstract: The present invention is directed to a semiconductor multilayer structure and fabrication method thereof. A semiconductor multilayer structure comprises a silicon substrate, and a plurality of semiconductor layers, wherein at least one of the semiconductor layers is an aluminum contained nitride layer; and an indium-containing catalyst is utilized to enhance migration of aluminum in the aluminum contained nitride layer. A fabrication method is also disclosed here. By utilizing the indium-containing catalyst and/or gallium-containing catalyst, the aluminum migration can be enhanced to increase quality and flatness of the aluminum contained nitride buffer layer. Furthermore, the costs and energy consumption can be reduced too.

Abstract: The present invention provides a semiconductor template, comprising: a substrate; a buffer layer, disposed on a surface of the substrate and comprises a first sub-buffer layer and a second sub-buffer layer sequentially stacked, wherein the buffer layer has irregular cracks such that the top surface of the buffer layer is discontinuous, and the depth of the cracks are greater than or equal to the thickness of the second sub-buffer layer and less than or equal to sum of the thickness of the first sub-buffer and the second sub-buffer layer; and an epitaxial layer, which is a continuous layer and disposed on the buffer layer.

Abstract: A system for manufacturing semiconductor epitaxy structure includes a deposition apparatus, a curvature monitor system and a control unit. The deposition apparatus is configured for sequentially depositing a buffer layer, a first epitaxy layer, an insertion layer, a second epitaxy layer on a substrate. The curvature monitor system is configured for monitoring a curvature value of the semiconductor epitaxy structure. The control unit is configured for controlling the deposition apparatus to stop depositing the buffer layer, the first epitaxy layer, the insertion layer and the second epitaxy layer according to the curvature value of the semiconductor epitaxy structure measured by the curvature monitor system. The above-mentioned system for manufacturing semiconductor epitaxy structure is able to effectively control the strain of the semiconductor epitaxy structure during growth. A method for manufacturing semiconductor epitaxy structure is also disclosed.

Abstract: A vapor deposition system and its wafer and thin-film temperature control method are disclosed. A susceptor carries a plurality of wafer holders with each bearing a wafer. The susceptor makes revolution around a center axle and each wafer holder rotates around its own axis. A carrier gas approaches a first surface of the wafer and is heated to form a thin film to be deposited on the first surface. An isothermal plate is placed at a second surface of the wafer and the second surface is opposite to the first surface. One or more remote temperature-measuring elements measure a temperature of a rear surface of the isothermal plate and the rear surface is opposite to the wafer, and a wafer-side temperature is calculated by the measured rear surface temperature of the isothermal plate.

Abstract: Apparatus and method for curvature and thin film stress measurement are disclosed. The apparatus comprises two light sources and a detector. Two light beams from the two light sources with an angle are not parallel. The two light beams are collimated and projected onto a specimen with a pitch. The detector receives the light beams reflected from the specimen. The curvature of the specimen is calculated via a distance between spots of the light beams on the detector or a size variation of one of the spots.

Abstract: A film-deposition apparatus simultaneously realizes high partial pressure of volatile components, great flow velocity and smooth deposition rate curve at lower gas consumption. The apparatus comprises a disk-like susceptor, a face member opposing the susceptor, an injector, a material gas introduction portion, and a gas exhaust portion. A wafer holder retains a substrate, and a supporting member of the susceptor retains the wafer holder. The susceptor revolves around its central axis and the substrate rotates by itself. The opposing face member is structured so that a fan-shaped recessed portion and a fan-shaped raised portion are formed alternately in a radial manner, by which the height of the flow channel changes in a circumferential direction. The apparatus provides film deposition equivalent to that attained under optimal conditions by a conventional apparatus at a smaller flow rate of the carrier gas, and increases a partial pressure of material gases of volatile components.

Abstract: The present invention discloses a method of fabricating flash memory cell for use in semiconductor memories. A nitrogen implantation step is added in the process to increase the performance of the device. The nitrogen implanted tunnel oxide exhibits a much higher electron conduction efficiency than the prior art tunnel oxides in both injection polarities. The value of charge-to-breakdown voltage of the nitrogen implanted tunnel oxide is also much larger than the narrow tunnel oxide. In addition, the electron trapping rate of the nitrogen implantation tunnel oxide is very small even under a very large electron fluence stressing (100 C/cm.sup.2).

Abstract: The present invention provides a method of to planarize a spin-on-glass layer overlying a HDP-CVD oxide layer using a six etchback process. The process comprises: forming a spin-on-glass layer 40 over a plasma chemical vapor deposition (HDP-CVD)oxide layer 30 over spaced raised portions 20 on a semiconductor structure. The spin-on-glass and the density plasma chemical vapor deposition (HDP-CVD) oxide layer 30 are then planarized using a six etch back process comprising: Step 2, (Etch High), a CF4 gas flow of between about 88 and 108 sccm, CHF.sub.3 flow between about 35 and 45 sccm, an argon flow of between about 40 and 60 sccm, at a pressure of between about 210 and 310 mtorr, at a power of between 650 and 950 watts; Step 3 (Etch Low) a CF4 gas flow of between about 10 and 20 sccm, CHF.sub.

Abstract: A microwave powered electron cyclotron resonance reactor employing a low pressure, high electron density plasma for rapid oxide etching using hydrogen and argon incorporates an alumina-coated quartz dielectric microwave window to couple microwave energy into an etch chamber while preventing oxygen in the window from contaminating the etch chamber or its contents. The etch chamber side of the dielectric microwave window is coated with alumina.

Abstract: Method employing low pressure plasma having high electron density for rapid oxide etching employing hydrogen and argon and specific electron clyclotron resonance (ECR) operating parameters in an ECR having a non-oxygen contributing environment in the reaction chamber.