Patents by Inventor Byong Hyop Oh

Byong Hyop Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150187840
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
    Type: Application
    Filed: January 5, 2015
    Publication date: July 2, 2015
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh
  • Publication number: 20150119252
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.
    Type: Application
    Filed: March 7, 2013
    Publication date: April 30, 2015
    Inventors: Eric Ladizinsky, Jeremy P. Hilton, Byong Hyop Oh, Paul I. Bunyk
  • Patent number: 8951808
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap contact connector.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: February 10, 2015
    Assignee: D-Wave Systems Inc.
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh
  • Publication number: 20110089405
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
    Type: Application
    Filed: February 25, 2010
    Publication date: April 21, 2011
    Applicant: D-WAVE SYSTEMS INC.
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh