Patents by Inventor Byron Harris

Byron Harris has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940912
    Abstract: A logical-to-physical (L2P) table is maintained, wherein a plurality of sections of the L2P table is cached in a volatile memory device. A total dirty count for the L2P table is maintained, wherein the total dirty count reflects a total number of updates to the L2P table. Respective section dirty counts for the plurality of sections are maintained, wherein each respective section dirty count reflects a total number of updates to a corresponding section. It is determined that the total dirty count for the L2P table satisfies a threshold criterion. In response to determining that the total dirty count for the L2P table satisfies the threshold criterion, a first section of the plurality of sections is identified based on the respective section dirty counts. The first section of the L2P table is written to a non-volatile memory device.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Publication number: 20240069774
    Abstract: Various embodiments provide for deferring adjustment of a zone in a memory system or sub-system that supports zones. In particular, some embodiments provide for deferred adjustment of a zone based on detection of an error in a block of an unassigned block set, which can be tracked using a counter.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Oyvind Haehre, Nathaniel Wessel, Byron Harris
  • Publication number: 20230289285
    Abstract: A journal count reflecting a number of logical-to-physical (L2P) journals written to a non-volatile memory device is maintained, wherein each L2P journal is associated with one or more updates to an L2P address mapping table. In response to determining that the journal count satisfies a threshold criterion, a first section of a plurality of sections of the L2P address mapping table is identified, wherein the plurality of sections of the L2P address mapping table is cached in a volatile memory device. The first section of the L2P address mapping table is written to the non-volatile memory device.
    Type: Application
    Filed: May 23, 2023
    Publication date: September 14, 2023
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Publication number: 20230281123
    Abstract: A logical-to-physical (L2P) table is maintained, wherein a plurality of sections of the L2P table is cached in a volatile memory device. A total dirty count for the L2P table is maintained, wherein the total dirty count reflects a total number of updates to the L2P table. Respective section dirty counts for the plurality of sections are maintained, wherein each respective section dirty count reflects a total number of updates to a corresponding section. It is determined that the total dirty count for the L2P table satisfies a threshold criterion. In response to determining that the total dirty count for the L2P table satisfies the threshold criterion, a first section of the plurality of sections is identified based on the respective section dirty counts. The first section of the L2P table is written to a non-volatile memory device.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 7, 2023
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Patent number: 11714748
    Abstract: A logical-to-physical (L2P) address mapping table is maintained, wherein a plurality of sections of the L2P address mapping table is cached in a volatile memory device. A journal entry count is maintained reflecting a number of L2P journal entries associated with an L2P journal. It is determined that the journal entry count satisfies a first threshold criterion. In response to determining that the journal entry count satisfies the first threshold criterion, a writing of the L2P journal to a non-volatile memory device is triggered. A written journal count reflecting a number of L2P journals written to the non-volatile memory device is maintained. In response to determining that the written journal count satisfies a second threshold criterion, a first section of the plurality of sections of the L2P address mapping table is identified. The first section of the L2P address mapping table is written to the non-volatile memory device.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: August 1, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Publication number: 20090103416
    Abstract: Methods are disclosed for determining the layout of cure sites/cure spots and/or stack positions on the recordable section of a holographic storage medium. Also disclosed are methods for carrying out pre-curing and stack writing routines for pre-curing, in an appropriate order, bookcases comprising such cure spots in the recordable section, and for writing stacks of holograms, in an appropriate order, to such bookcases after determining such layouts.
    Type: Application
    Filed: September 15, 2008
    Publication date: April 23, 2009
    Applicant: INPHASE TECHNOLOGIES, INC.
    Inventors: Paul C. SMITH, Tod R. EARHART, Oyvind HAEHRE, John MURPHY, John J. KANE, Byron Harris
  • Publication number: 20050108444
    Abstract: A system for detecting, monitoring, reporting, and managing congestion in a fabric at the port and fabric levels. The system includes multi-port switches in the fabric with port controllers that collect port traffic statistics. A congestion analysis module in the switch periodically gathers port statistics and processes the statistics to identify backpressure congestion, resource limited congestion, and over-subscription congestion at the ports. A port activity database is maintained at the switch with an entry for each port and contains counters for the types of congestion. The counters for ports that are identified as congested are incremented to reflect the detected congestion. The system includes a management platform that periodically requests copies of the port congestion data from the switches in the fabric. The switch data is aggregated to determine fabric congestion including the congestion level and type for each port and congestion sources.
    Type: Application
    Filed: November 19, 2003
    Publication date: May 19, 2005
    Inventors: Gary Flauaus, Byron Harris, Byron Jacquot
  • Patent number: D1016870
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: March 5, 2024
    Assignees: Hyundai Motor Company, Kia Corporation
    Inventors: Ernestine Fu, John Suh, Prasanna Natarajan, Jacob Viau, Andriy Banadyga, Brandon Cramer, Grey Parker, David Byron, Andrew John Harris