Abstract: A display device includes a display unit including a pixel which displays an image based on a first power voltage and a data signal, a gamma voltage generator which generates gamma voltages, and a data driver which generates the signal using the gamma voltages and provides the data signal to the pixel. The gamma voltage generator generates first and second reference voltages, generates first and second corrected reference voltages by correcting the first and second reference voltages using a target voltage and an external power voltage provided from the display unit in correspondence with the first power voltage, and generates the gamma voltages by dividing the first and second corrected reference voltages. The gamma voltage generator sets the target voltage based on at least one selected from the first reference voltage, the second reference voltage, and a ground voltage.

Abstract: A display device includes a display panel including pixels coupled to a first scan line and a data line, a power supply to supply voltages, a scan driver to provide a first scan signal to the first scan line a plurality of times for a first frame period (FFP), a data driver to supply a data signal to the data line, and a timing controller to control driving of components. The FFP includes: a first active period (FAP), in which the data signal is supplied; and a first blank period (FBP), in which the data signal is not supplied. The power supply provides on-bias power having a first voltage level (FVL) in the FAP, and provides on-bias power having a second voltage level (SVL) in the FBP. The FBP following the FAP includes a first dimming period in which the on-bias power gradually changes from the FVL to the SVL.

Abstract: A signal generator may include a reference horizontal synchronization signal generation block which generates reference horizontal synchronization signals based on a number of clock signals per a horizontal time, a frame clock calculation block which calculates a first frame clock number based on a number of the clock signals per the horizontal time, a frame clock comparation block which calculates a clock offset by comparing the first frame clock number and a second frame clock number generated based on a number of the clock signals per a frame time, a clock distribution block which generates horizontal synchronization signals by distributing a number of the clock signals corresponding to the clock offset to the reference horizontal synchronization signals, and a vertical synchronization signal generation block which generates a vertical synchronization signal based on the horizontal synchronization signals.

Abstract: A display device may include a display panel which includes pixels, a data driver which provides data voltages corresponding to output image data to the pixels, and a data converter which generates a compensation grayscale from reference compensation values for compensating at least one selected from a color shift and a luminance shift corresponding to a temperature based on an input temperature, an input grayscale included in input image data, and an input luminance, and converts the input image data into the output image data based on the compensation grayscale.

Abstract: A display device including a display panel including a scan line, a data line, and a pixel connected thereto, a gate driver, and a source driver including a gamma voltage generator to generate gamma voltages having different voltage levels, a digital-to-analog converter to generate the data voltage corresponding to a gray scale value using the gamma voltages, and a source buffer, in which the gamma voltage generator includes a first resistor string to set a voltage range of the gamma voltages, a second resistor string to set tab gamma voltages corresponding to some of the gamma voltages within the voltage range, gamma buffers to output the tab gamma voltages, and a third resistor string including tabs respectively connected to output terminals of the gamma buffers, the third resistor string being configured to divide a voltage between the tabs to generate the gamma voltages.

Abstract: Disclosed is a data driving circuit including a noise filter, first through third voltage generators, and an output circuit. The noise filter receives a driving voltage and removes noise from the driving voltage to output a filtered driving voltage. The first voltage generator outputs a first voltage, a second voltage, and a third voltage. The second voltage generator generates a first reference voltage based on the filtered driving voltage, the first voltage, and the second voltage. The third voltage generator generates a second reference voltage based on the filtered driving voltage, the second voltage, and the third voltage. The output circuit outputs a data signal of a voltage level corresponding to an image signal based on the first reference voltage and the second reference voltage.

Abstract: A display device including: a display region including a first pixel region, a second pixel region, and a third pixel region; a dummy region including a first dummy region disposed between the second pixel region and the third pixel region; first, second, and third pixels respectively arranged in the first pixel region, the second pixel region, and the third pixel region in a matrix of vertical lines and horizontal lines; a data converter configured to receive first image data including effective data corresponding to the display region and dummy data corresponding to the dummy region and generate second image data by converting a gray scale value of dummy data corresponding to at least one region of the first dummy region in the first image data into a predetermined first gray scale value, the first gray scale value being between a lowest gray scale value and a highest gray scale value.

Abstract: A display device includes a display panel including pixels coupled to a first scan line and a data line, a power supply to supply voltages, a scan driver to provide a first scan signal to the first scan line a plurality of times for a first frame period (FFP), a data driver to supply a data signal to the data line, and a timing controller to control driving of components. The FFP includes: a first active period (FAP), in which the data signal is supplied; and a first blank period (FBP), in which the data signal is not supplied. The power supply provides on-bias power having a first voltage level (FVL) in the FAP, and provides on-bias power having a second voltage level (SVL) in the FBP. The FBP following the FAP includes a first dimming period in which the on-bias power gradually changes from the FVL to the SVL.

Abstract: A display driving circuit includes a clock signal generator which generates a clock signal at a frequency in response to a frequency control signal, a frequency variation determiner which adaptively changes a frequency variation of the clock signal, based on a magnitude of a deviation between the frequency of the clock signal and a target frequency calculated based on a reference clock signal supplied from the outside, and a frequency controller which generates the frequency control signal which updates the frequency of the clock signal, based on the frequency variation, and provides the frequency control signal to the clock signal generator.

Abstract: A display device including: a display panel; a scan driver; and a data driver, wherein the data driver includes: a controller configured to generate a gamma voltage control signal with respect to gamma voltage information corresponding to a target luminance level of an image displayed by the display panel; a gamma voltage generator configured to generate gamma voltages having a voltage range corresponding to the target luminance level based on the gamma voltage control signal; and a decoder configured to generate the data signal corresponding to a grayscale value using the gamma voltages, and wherein the controller calculates an offset value corresponding to the target luminance level and applies the offset value to values obtained using gamma voltage information about sample luminance levels to obtain gamma voltage information corresponding to the target luminance level.

Abstract: Disclosed is a display device, which includes a display panel, a controller that receives an image signal and an external synchronization signal and generates a control signal, and a driver that generates a driving signal in response the control signal and provides the driving signal to the display panel. The controller includes a synchronization signal generator that generates an internal synchronization signal based on a reference clock signal, a corrector that corrects the internal synchronization signal to generate a corrected synchronization signal, and a control signal generator that generates the control signal, and the control signal generator generates the control signal based on the external synchronization signal when the external synchronization signal is in a normal state, and generates the control signal based on the internal synchronization signal when the external synchronization signal is in an abnormal state.

Abstract: A signal generator may include a reference horizontal synchronization signal generation block which generates reference horizontal synchronization signals based on a number of clock signals per a horizontal time, a frame clock calculation block which calculates a first frame clock number based on a number of the clock signals per the horizontal time, a frame clock comparation block which calculates a clock offset by comparing the first frame clock number and a second frame clock number generated based on a number of the clock signals per a frame time, a clock distribution block which generates horizontal synchronization signals by distributing a number of the clock signals corresponding to the clock offset to the reference horizontal synchronization signals, and a vertical synchronization signal generation block which generates a vertical synchronization signal based on the horizontal synchronization signals.

Abstract: A method for preventing an inrush current of an electric vehicle charger may include the steps of determining whether there is a need for an increase or decrease in a charging current level while currently supplied to an electric vehicle to be charged; decreasing the charging current level at a predetermined ratio when it is determined that there is the need for the increase or decrease in the charging current level; checking whether an inrush current occurs for a first time; activating or deactivating at least one charging module to increase or decrease the charging current level according to the request of the electric vehicle to be charged, when the inrush current does not occur for the first time; checking whether the inrush current occurs for a second time; and increasing the charging current level by the charging current level requested by the electric vehicle to be charged, when the inrush current does not occur for the second time.

Abstract: A display device includes: a display region including a first pixel region, a second pixel region, and a third pixel region; a dummy region including a first dummy region disposed between the second pixel region and the third pixel region; first, second, and third pixels respectively arranged in the first pixel region, the second pixel region, and the third pixel region in a matrix of vertical lines and horizontal lines; a data converter configured to: receive first image data including effective data corresponding to the display region and dummy data corresponding to the dummy region; and generate second image data by converting a gray scale value of dummy data corresponding to at least one region of the first dummy region in the first image data into a predetermined first gray scale value, the first gray scale value being between a lowest gray scale value and a highest gray scale value.

Abstract: A display driving circuit includes a clock signal generator which generates a clock signal at a frequency in response to a frequency control signal, a frequency variation determiner which adaptively changes a frequency variation of the clock signal, based on a magnitude of a deviation between the frequency of the clock signal and a target frequency calculated based on a reference clock signal supplied from the outside, and a frequency controller which generates the frequency control signal which updates the frequency of the clock signal, based on the frequency variation, and provides the frequency control signal to the clock signal generator.

Abstract: A display device includes a display unit including a pixel which displays an image based on a first power voltage and a data signal, a gamma voltage generator which generates gamma voltages, and a data driver which generates the signal using the gamma voltages and provides the data signal to the pixel. The gamma voltage generator generates first and second reference voltages, generates first and second corrected reference voltages by correcting the first and second reference voltages using a target voltage and an external power voltage provided from the display unit in correspondence with the first power voltage, and generates the gamma voltages by dividing the first and second corrected reference voltages. The gamma voltage generator sets the target voltage based on at least one selected from the first reference voltage, the second reference voltage, and a ground voltage.

Abstract: A test handler includes a pusher which includes a pusher end which comes into contact with a DUT (Device Under Test) to transfer heat, and a pusher body which conducts heat to the pusher end, the pusher end separating a test tray for fixing the DUT and the pusher body from each other; a porous match plate including a pusher arrangement region in which the pusher body is placed, and a plurality of holes placed adjacent to the pusher arrangement region; a heater placed on an upper surface of the porous match plate to control temperature of the pusher; and an airflow input port placed on the heater to provide the airflow to the plurality of holes, in which the airflow passes through the plurality of holes and passes through a separated space between the test tray and the pusher body.

Abstract: A display device includes a display panel including pixels coupled to a first scan line and a data line, a power supply to supply voltages, a scan driver to provide a first scan signal to the first scan line a plurality of times for a first frame period (FFP), a data driver to supply a data signal to the data line, and a timing controller to control driving of components. The FFP includes: a first active period (FAP), in which the data signal is supplied; and a first blank period (FBP), in which the data signal is not supplied. The power supply provides on-bias power having a first voltage level (FVL) in the FAP, and provides on-bias power having a second voltage level (SVL) in the FBP. The FBP following the FAP includes a first dimming period in which the on-bias power gradually changes from the FVL to the SVL.

Abstract: A display device includes a display panel, a scan driver, a data compensator, and a data driver. The display panel includes a first area and a second area distinguished from each other along a scan direction. Each of the first and second areas include pixels. The scan driver is configured to sequentially provide scan signals to the display panel along the scan direction. The data compensator is configured to: detect a pattern in which a difference between adjacent grayscale values in image data is greater than a reference value; and generate compensated image data by compensating for grayscale values corresponding to the second area in the image data based on the pattern corresponding to the first area. The data driver is configured to: generate data signals based on the compensated image data; and provide the data signals to the display panel.