Patents by Inventor Byung Hyun Jung
Byung Hyun Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11970090Abstract: A railess variable seatback type rear seat includes: a linear movement device configured to convert a rotation of a motor into a linear movement; a sliding movement device configured to convert the linear movement into a sliding movement in which a seat cushion is pushed forward or backward; and a reclining angle change device configured to convert the sliding movement into a reclining movement, and to fold a seatback, which is connected to the seat cushion, forward or to recline the seatback backward.Type: GrantFiled: July 20, 2021Date of Patent: April 30, 2024Assignees: HYUNDAI MOTOR COMPANY, Kia Corporation, Daechang Seat Co.,LTD-Dongtan, Hyundai Transys Inc.Inventors: Seung-Hyun Kim, Sang-Hyun Lee, Min-Ju Lee, Byung-Yong Choi, Chan-Ho Jung, Seon-Chae Na, Young-Woon Choi, Jae-Jin Lee, Dong-Hwan Kim, In-Chang Hwang
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Patent number: 7259092Abstract: A semiconductor device and a method for fabricating the same is disclosed, to prevent a defective contact of a line in a method of completely filling a minute contact hole having a high aspect ratio with a refractory metal layer, which includes the steps of forming a contact hole in an insulating interlayer of a semiconductor substrate; depositing a barrier metal layer on an inner surface of the contact hole and an upper surface of the insulating interlayer, wherein the process of depositing the barrier metal is performed by sequentially progressing one cycle of: injecting a reaction gas of SiH4 to the chamber, injecting a first purging gas to the chamber, injecting a reaction gas of WF6 to the chamber; injecting a second purging gas to the chamber, injecting a reaction gas of NH3 to the chamber, and injecting a third purging gas to the chamber; depositing a first metal layer for nucleation on the barrier metal layer by the atomic layer deposition process; and depositing a second metal layer on the first metaType: GrantFiled: August 30, 2004Date of Patent: August 21, 2007Assignee: Dongbu Electronics Co., Ltd.Inventor: Byung Hyun Jung
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Patent number: 7148139Abstract: A method for forming a metal wiring of a semiconductor includes forming an inter metal dielectric layer on a semiconductor substrate having a predetermined low structure with a conductive layer. A plurality of contact holes is formed to expose the conductive layer through the inter metal dielectric layer. A first titanium nitride layer is formed on sidewalls of the contact holes. The first titanium nitride layer is plasma processed. A first titanium silicon nitride layer is formed on the first titanium nitride layer. Metal plugs are formed on the first titanium silicon nitride layer. The metal plugs, the first titanium silicon nitride layer, and the first titanium nitride layer are polished to expose the inter metal dielectric layer. Metal wirings are formed to cover the contact holes.Type: GrantFiled: December 30, 2004Date of Patent: December 12, 2006Assignee: Dongbu Electronics Co., Ltd.Inventor: Byung-Hyun Jung
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Patent number: 7022601Abstract: A method of manufacturing a semiconductor device is disclosed wherein a WSiN layer is deposited in a contact hole as a barrier metal using an ALD process. A tungsten layer is deposited on the WSiN layer in the nucleation stage thereof. Then, using a CVD process, the contact hole is completely filled with a tungsten layer. The WSiN layer is continuously and uniformly deposited in the contact hole having high aspect ratio, and the tungsten layer in the nucleation stage can be continuously and uniformly deposited on the WSiN layer, thus completely filling the contact hole with a tungsten layer deposited by the CVD process.Type: GrantFiled: December 8, 2003Date of Patent: April 4, 2006Assignee: DongbuAnam Semiconductor Inc.Inventors: Byung Hyun Jung, Dae Heok Kwon
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Patent number: 6916737Abstract: Methods of manufacturing semiconductor devices are disclosed. In an illustrated method, a contact hole in an insulating layer is filled with a copper layer and the copper layer is planarized. During the planarzing, a CuO layer is parasitically formed on the surface of the copper layer. The CuO layer is removed by plasma processing using ammonia or nitrogen. A conductive CuN layer is formed on the surface of the copper layer. Stability of the removal process of CuO layer is secured.Type: GrantFiled: November 25, 2003Date of Patent: July 12, 2005Assignee: DongbuAnam Semiconductor, Inc.Inventors: Byung Hyun Jung, Hyoung Yoon Kim
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Publication number: 20050142842Abstract: A method for forming a metal wiring of a semiconductor includes forming an inter metal dielectric layer on a semiconductor substrate having a predetermined low structure with a conductive layer. A plurality of contact holes is formed to expose the conductive layer through the inter metal dielectric layer. A first titanium nitride layer is formed on sidewalls of the contact holes. The first titanium nitride layer is plasma processed. A first titanium silicon nitride layer is formed on the first titanium nitride layer. Metal plugs are formed on the first titanium silicon nitride layer. The metal plugs, the first titanium silicon nitride layer, and the first titanium nitride layer are polished to expose the inter metal dielectric layer. Metal wirings are formed to cover the contact holes.Type: ApplicationFiled: December 30, 2004Publication date: June 30, 2005Applicant: DongbuAnam Semiconductor, Inc.Inventor: Byung-Hyun Jung
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Publication number: 20050140012Abstract: The method for forming the copper wiring of the semiconductor device includes the steps of forming a first copper wiring on a semiconductor substrate having a predetermined low structure, implanting magnesium ion on the first copper wiring, forming a magnesium oxide layer on the first copper wiring by thermal treating the first copper wiring, and forming a second copper wiring on the magnesium oxide layer.Type: ApplicationFiled: December 30, 2004Publication date: June 30, 2005Inventor: Byung-Hyun Jung
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Patent number: 6911382Abstract: Semiconductor devices and methods to form a contact of a semiconductor device are disclosed. An example method to form a contact includes forming an insulating layer on a substrate; etching the insulating layer to form a contact hole; depositing a silicon layer on sidewalls and an undersurface of the contact hole; forming a silicon spacer on the sidewalls of the contact hole by etching the silicon layer; transforming the silicon spacer to a silicon nitride spacer; depositing a diffusion barrier on the silicon nitride spacer; and filling the contact hole with tungsten. Because the silicon nitride spacer formed on the sidewalls of the contact hole can serve as a leakage current blocking layer, the yield and the reliability of the semiconductor devices manufactured by this example process are enhanced.Type: GrantFiled: November 25, 2003Date of Patent: June 28, 2005Assignee: Dongbu Electronics Co., Ltd.Inventors: Byung Hyun Jung, Bo Min Seo
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Patent number: 6800553Abstract: Disclosed is a method for manufacturing a silicide layer of semiconductor device. The disclosed comprises the steps of: depositing a lower metal layer on the surface of semiconductor substrate and then, performing a plasma treatment; and depositing an upper metal layer on the plasma-treated lower metal layer and then, performing a thermal treatment process, thereby forming a silicide layer on the surface of semiconductor substrate.Type: GrantFiled: June 26, 2002Date of Patent: October 5, 2004Assignee: Dongbu Electronics, Co., LtdInventors: Byung Hyun Jung, Hyoung Yoon Kim
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Publication number: 20040127017Abstract: Semiconductor devices and methods to form a contact of a semiconductor device are disclosed. An example method to form a contact includes forming an insulating layer on a substrate; etching the insulating layer to form a contact hole; depositing a silicon layer on sidewalls and an undersurface of the contact hole; forming a silicon spacer on the sidewalls of the contact hole by etching the silicon layer; transforming the silicon spacer to a silicon nitride spacer; depositing a diffusion barrier on the silicon nitride spacer; and filling the contact hole with tungsten. Because the silicon nitride spacer formed on the sidewalls of the contact hole can serve as a leakage current blocking layer, the yield and the reliability of the semiconductor devices manufactured by this example process are enhanced.Type: ApplicationFiled: November 25, 2003Publication date: July 1, 2004Inventors: Byung Hyun Jung, Bo Min Seo
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Publication number: 20040115913Abstract: A method of manufacturing a semiconductor device is disclosed wherein a WSiN layer is deposited in a contact hole as a barrier metal using an ALD process. A tungsten layer is deposited on the WSiN layer in the nucleation stage thereof. Then, using a CVD process, the contact hole is completely filled with a tungsten layer. The WSiN layer is continuously and uniformly deposited in the contact hole having high aspect ratio, and the tungsten layer in the nucleation stage can be continuously and uniformly deposited on the WSiN layer, thus completely filling the contact hole with a tungsten layer deposited by the CVD process.Type: ApplicationFiled: December 8, 2003Publication date: June 17, 2004Applicant: Dongbu Electronics Co., Ltd.Inventors: Byung Hyun Jung, Dae Heok Kwon
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Publication number: 20040115933Abstract: Methods of manufacturing semiconductor devices are disclosed. In an illustrated method, a contact hole in an insulating layer is filled with a copper layer and the copper layer is planarized. During the planarzing, a CuO layer is parasitically formed on the surface of the copper layer. The CuO layer is removed by plasma processing using ammonia or nitrogen. A conductive CuN layer is formed on the surface of the copper layer. Stability of the removal process of CuO layer is secured.Type: ApplicationFiled: November 25, 2003Publication date: June 17, 2004Inventors: Byung Hyun Jung, Hyoung Yoon Kim
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Publication number: 20030003731Abstract: Disclosed is a method for manufacturing a silicide layer of semiconductor device. The disclosed comprises the steps of: depositing a lower metal layer on the surface of semiconductor substrate and then, performing a plasma treatment; and depositing an upper metal layer on the plasma-treated lower metal layer and then, performing a thermal treatment process, thereby forming a silicide layer on the surface of semiconductor substrate.Type: ApplicationFiled: June 26, 2002Publication date: January 2, 2003Inventors: Byung Hyun Jung, Hyoung Yoon Kim
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Patent number: 6319825Abstract: A metallization process of a semiconductor device is disclosed. The metallization process of a semiconductor device comprising the steps of: providing a semiconductor substrate having a junction region; forming an insulating layer on the upper of the semiconductor substrate; forming a contact hole by patterning the insulating layer so as to expose one portion of the junction region; forming a glue layer on the upper of the insulating layer, and at the bottom and inner surfaces of the contact hole; forming a barrier metal layer on the glue layer; forming an Mg layer as a solid solution layer on the barrier metal layer; forming a metal layer on the Mg layer; and forming a metal wiring layer having more liquidity than that of the metal layer, by melting the Mg layer to the metal.Type: GrantFiled: May 12, 1999Date of Patent: November 20, 2001Assignee: Dongbu Electronics Co., Ltd.Inventors: Byung Hyun Jung, Heui Bok Ahn