Abstract: Provided is a laminated glass, comprising: a soda lime glass; and a non-tempered alkali-free glass bonded to one surface of the soda lime glass, in which a thickness of the soda lime glass is larger than a thickness of the non-tempered alkali-free glass, and an elastic modulus of the non-tempered alkali-free glass is larger than an elastic modulus of the soda lime glass.

Abstract: Provided is glass with high temperature stability, a low coefficient of thermal expansion and a high mechanical strength, a light guide plate including the glass to replace the conventional PMMA and metal frame, and fabricating methods thereof. The glass according to the present disclosure is borosilicate glass containing 75˜85 wt % of SiO2, 5˜15 wt % of B2O3, 0˜5 wt % of Al2O3, R2O 1˜7 wt % where R is at least one of Li, Na and K, and <0.005 wt % of Fe2O3 and having the redox ratio 0.5 or more. This glass maintains luminance and has an excellent color difference reduction effect when used in a light guide plate.

Abstract: Provided is glass with high temperature stability, a low coefficient of thermal expansion and a high mechanical strength, a light guide plate including the glass to replace the conventional PMMA and metal frame, and fabricating methods thereof. The glass according to the present disclosure is borosilicate glass containing 75˜85 wt % of SiO2, 5˜15 wt % of B2O3, 0˜5 wt % of Al2O3, R2O 1˜7 wt % where R is at least one of Li, Na and K, and <0.005 wt % of Fe2O3 and having the redox ratio 0.5 or more. This glass maintains luminance and has an excellent color difference reduction effect when used in a light guide plate.

Abstract: A glass light-guide plate having a small color difference and a manufacturing method thereof are provided. The light-guide plate includes glass containing 70 to 85 wt % of SiO2, 5 to 20 wt % of B2O3, 0 to 5 wt % of Al2O3, 1 to 7 wt % of R2O (here, R is at least one of Li, Na, and K), 0 to 0.005 wt % of Fe2O3, and less than 0.002 wt % of a transition metal oxide for adjusting a color difference.

Abstract: Provided is a laminated glass, comprising: a soda lime glass; and a non-tempered alkali-free glass bonded to one surface of the soda lime glass, in which a thickness of the soda lime glass is larger than a thickness of the non-tempered alkali-free glass, and an elastic modulus of the non-tempered alkali-free glass is larger than an elastic modulus of the soda lime glass.

Abstract: A glass light-guiding plate which has high-temperature stability and is advantageous in being manufactured in a slim profile is provided. The glass light-guiding plate includes a glass plate including 75 to 85 wt % SiO2, 5 to 20 wt % B2O3, 1 to 5 wt % Al2O3, 3 to 8 wt % R2O (here, R is at least one of Li, Na, and K), and Fe2O3<0.0025 wt %.

Abstract: A glass light-guide plate having a small color difference and a manufacturing method thereof are provided. The light-guide plate includes glass containing 70 to 85 wt % of SiO2, 5 to 20 wt % of B2O3, 0 to 5 wt % of Al2O3, 1 to 7 wt % of R2O (here, R is at least one of Li, Na, and K), 0 to 0.005 wt % of Fe2O3, and less than 0.002 wt % of a transition metal oxide for adjusting a color difference.

Abstract: Provided is glass with high temperature stability, a low coefficient of thermal expansion and a high mechanical strength, a light guide plate including the glass to replace the conventional PMMA and metal frame, and fabricating methods thereof. The glass according to the present disclosure is borosilicate glass containing 75˜85 wt % of SiO2, 5˜15 wt % of B2O3, 0˜5 wt % of Al2O3, R2O 1˜7 wt % where R is at least one of Li, Na and K, and <0.005 wt % of Fe2O3 and having the redox ratio 0.5 or more. This glass maintains luminance and has an excellent color difference reduction effect when used in a light guide plate.

Abstract: A glass light-guiding plate which has high-temperature stability and is advantageous in being manufactured in a slim profile is provided. The glass light-guiding plate includes a glass plate including 75 to 85 wt % SiO2, 5 to 20 wt % B2O3, 1 to 5 wt % Al2O3, 3 to 8 wt % R2O (here, R is at least one of Li, Na, and K), and Fe2O3<0.0025 wt %.

Abstract: A method for fabricating an oxide thin film transistor includes sequentially forming a gate insulating film, an oxide semiconductor layer, and a first insulating layer; selectively patterning the oxide semiconductor layer and the first insulating layer to form an active layer and an insulating layer pattern on the gate electrode; forming a second insulating layer on the substrate having the active layer and the insulating layer pattern formed thereon; and selectively patterning the insulating layer pattern and the second insulating layer to form first and second etch stoppers on the active layer. The oxide semiconductor layer may be a ternary system or quaternary system oxide semiconductor comprising a combination of AxByCzO (A, B, C=Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z?0).

Abstract: An array substrate for an in-plane switching mode liquid crystal display device includes: a gate line on a substrate; a data line crossing the gate line to define a pixel region on the substrate; a common line parallel to and spaced apart from the gate line; a gate electrode connected to the gate line; a semiconductor layer disposed over the gate electrode, wherein an area of the semiconductor layer is less than an area of the gate electrode; a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode, the source and drain electrodes disposed on the semiconductor layer; a plurality of pixel electrodes integrated with the drain electrode and extending from the drain electrode in the pixel region; and a plurality of common electrodes connected to the common line and alternately arranged with the plurality of pixel electrodes, wherein each of the source electrode, the drain electrode, the data line and the plurality of pixel electrodes are comprised from a first co

Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate electrode and a gate line on a substrate through a first mask process, forming a first insulating layer, an active layer, an ohmic contact layer, a buffer metallic layer, and a data line on the substrate including the gate electrode and the gate line through a second mask process, and forming a source electrode, a drain electrode, and a pixel electrode through a third mask process, the pixel electrode extending from the drain electrode, wherein the active layer is disposed over and within the gate electrode.

Abstract: A method for fabricating an oxide thin film transistor includes sequentially forming a gate insulating film, an oxide semiconductor layer, and a first insulating layer; selectively patterning the oxide semiconductor layer and the first insulating layer to form an active layer and an insulating layer pattern on the gate electrode; forming a second insulating layer on the substrate having the active layer and the insulating layer pattern formed thereon; and selectively patterning the insulating layer pattern and the second insulating layer to form first and second etch stoppers on the active layer. The oxide semiconductor layer may be a ternary system or quaternary system oxide semiconductor comprising a combination of AxByCzO (A, B, C?Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z?0).

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate electrode and a gate line on a substrate through a first mask process, forming a first insulating layer, an active layer, an ohmic contact layer, a buffer metallic layer, and a data line on the substrate including the gate electrode and the gate line through a second mask process, and forming a source electrode, a drain electrode, and a pixel electrode through a third mask process, the pixel electrode extending from the drain electrode, wherein the active layer is disposed over and within the gate electrode.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, the thin film transistor being electrically connected to the gate line and the data line and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the active layer is disposed over and within the gate electrode.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract: An array substrate for an in-plane switching mode liquid crystal display device includes: a gate line on a substrate; a data line crossing the gate line to define a pixel region on the substrate; a common line parallel to and spaced apart from the gate line; a gate electrode connected to the gate line; a semiconductor layer disposed over the gate electrode, wherein an area of the semiconductor layer is less than an area of the gate electrode; a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode, the source and drain electrodes disposed on the semiconductor layer; a plurality of pixel electrodes integrated with the drain electrode and extending from the drain electrode in the pixel region; and a plurality of common electrodes connected to the common line and alternately arranged with the plurality of pixel electrodes, wherein each of the source electrode, the drain electrode, the data line and the plurality of pixel electrodes are comprised from a first co

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, the thin film transistor being electrically connected to the gate line and the data line and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the active layer is disposed over and within the gate electrode.