Abstract: The present invention relates to a multi-position sensing apparatus capable of sensing a position and an angle of a target, the apparatus including: a light emitting element that irradiates detection light to a first or second target; a first light receiving part having a first light receiving area in a first light receiving range angle with respect to a first light receiving axis to receive a first or second reflective light reflected from the first or second target; and a second light receiving receiving range angle with respect to a second light receiving axis in parallel to the first light receiving axis to receive the second or first reflective light reflected from the second or first target.

Abstract: The present invention relates to a multi-position sensing apparatus capable of sensing a position and an angle of a target, the apparatus including: a light emitting element that irradiates detection light to a first or second target; a first light receiving part having a first light receiving area in a first light receiving range angle with respect to a first light receiving axis to receive a first or second reflective light reflected from the first or second target; and a second light receiving receiving range angle with respect to a second light receiving axis in parallel to the first light receiving axis to receive the second or first reflective light reflected from the second or first target.

Abstract: A data reception apparatus is disclosed. The data reception apparatus includes a strobe extractor for receiving a transmission signal and extracting a strobe signal from the transmission signal, the transmission signal including the strobe signal inserted between data signals and a clock signal following the strobe signal, the strobe signal having a different magnitude from a magnitude of a data signal, and the clock signal having an equal magnitude to the magnitude of the data signal, a clock recoverer for recovering the clock signal from the transmission signal, using the extracted strobe signal, and a sampler for sampling the data signals included in the transmission signal in response to the recovered clock signal. The probability of generating a timing skew error in the time interval between a clock signal and a data signal is minimized. Even though the level of a common component might change, the clock signal can be recovered accurately and the size of the clock recovery circuit can be reduced.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device can provide a trench MOS transistor having an up-drain structure. The semiconductor device can include a first conductive type well in a semiconductor substrate, a second conductive type well on the first conductive type well, trenches formed by removing portions of the second conductive type well and the first conductive type well; gates provided in the trenches with a gate dielectric being between each gate and the walls of the trench, a first conductive type source region and a second conductive type body region on the second conductive type well, the first conductive type source region surrounding a lateral surface of the gate, and a common drain between the gates, the common drain being connected to the first conductive type well.

Abstract: A semiconductor device, a method for fabricating the same, and a transformer circuit using the same are disclosed. The semiconductor device includes a trench metal oxide semiconductor (MOS) transistor for switching a load of current supplied from a power source, and a boost controller for controlling driving of the trench MOS transistor, the boost controller being formed with the trench MOS transistor on a single semiconductor device to form an integrated structure. In this structure, the physical space of the semiconductor device is reduced, thereby reducing the size of a DC-DC transformer circuit using the semiconductor device. It is possible to obtain finely-adjusted output values by controlling values of the ripple current and ripple voltage. A desired operational stability according to a variation in temperature can also be secured.

Abstract: Embodiments relate to a start-up circuit for a reference voltage generation circuit. According to embodiments, a start-up circuit may include a start-up start unit allowing current to flow in the reference voltage generation circuit to initiate a start-up process in response to a start-up start signal, a reference current generation unit decreasing a variable voltage depending on whether the reference voltage generation circuit is started up and generating start-up reference current corresponding to the variable voltage, and a start-up controller detecting current flowing in the reference voltage generation circuit, comparing the detected result with the start-up reference current, and outputting the compared result as a start-up start signal. Current consumption may be decreased after start-up. A BRG circuit may be stably started up. If a high supply voltage is used, current consumption may decrease, and if a low supply voltage is used, a BGR circuit may be stably started up.

Abstract: Disclosed is a differential pre-emphasis driver. The driver includes a first current source supplying a first current, a second current source supplying a second current greater than the first current, a first select circuit for selectively connecting the first current source to a first output terminal or a second output terminal, and a second select circuit for selectively connecting the second current source to the first output terminal or the second output terminal. The first and second select circuits pre-emphasize a transmission signal by selectively combining the first output terminal, the second output terminal, the first current source and the second current source.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device includes a first conductive well region in a semiconductor substrate and a second conductive well region on or in the first conductive well region. A gate electrode is in a trench on a gate insulation layer, and the trench is in the second conductive region and the first conductive well region. A drain includes a drain insulation layer, a (polysilicon) shield layer, and drain plug. The drain insulation layer is in a trench in the second conductive region and the first conductive well region. The shield layer encloses the drain plug. A lower portion of the drain plug contacts the second conductive well region. A first conductive source region is at a side of the gate electrode.

Abstract: An apparatus for transmitting data comprises a clock signal generator generating clock signals; and a transmitter generating transmitting signals having same sized and shaped differential signals, i.e., the clock signals and data signals, subsequent to a strobe signal having common components different from those of the data signals. Accordingly, even though the distortion occurs in the strobe signal during transmission, the clock signal and the data signal can easily be recovered within a give action margin, and timing skew error variation between the clock signal and the data signal can be minimized by noise occurring in the transmission path, whereby the data signal can be transmitted at a higher frequency. Since the clock signal is recovered using the strobe signal, an area occupied by a circuit built in the apparatus for receiving data and used for recovery of the clock signal can be reduced.

Abstract: Disclosed is a differential pre-emphasis driver. The driver includes a first current source supplying a first current, a second current source supplying a second current greater than the first current, a first select circuit for selectively connecting the first current source to a first output terminal or a second output terminal, and a second select circuit for selectively connecting the second current source to the first output terminal or the second output terminal. The first and second select circuits pre-emphasize a transmission signal by selectively combining the first output terminal, the second output terminal, the first current source and the second current source.

Abstract: A display is provided, which includes a timing controller, a data driver, and first and second termination resistors. The timing controller transmits a transmission signal, including at least one of a data signal, a clock signal, and a strobe signal, in a differential format and drives current in a pull mode. The data driver reconstructs the data from the transmission signal. One end of each of the first and second termination resistors is connected respectively between the data driver and terminations of first and second transmission signal lines, each signal line being a path through which the transmission signal is transmitted from the timing controller to the data driver and the other ends thereof are connected respectively to first and second termination voltage sources. Thus, it is possible to more simply implement the timing controller on the transmitting side, and also to increase data transmission efficiency.

Abstract: A timing controller for a display, video, audio, or other device generates and transmits a transmission signal including a strobe signal inserted between data signals including image data and a clock signal inserted following the strobe signal, the strobe signal having a different magnitude from a magnitude of the data signal, and the clock signal having an equal magnitude to the magnitude of the data signal. A column driving circuit receives the transmission signal, extracting the strobe signal from the transmission signal, recovering the clock signal using the extracted strobe signal, and sampling the data signal included in the transmission signal in response to the recovered clock signal. The probability of generating a timing skew error in the time interval between a clock signal and a data signal is minimized. Even though the level of a common component might change, the clock signal can be recovered accurately and the size of the clock recovery circuit can be reduced.

Abstract: A data reception apparatus is disclosed. The data reception apparatus includes a strobe extractor for receiving a transmission signal and extracting a strobe signal from the transmission signal, the transmission signal including the strobe signal inserted between data signals and a clock signal following the strobe signal, the strobe signal having a different magnitude from a magnitude of a data signal, and the clock signal having an equal magnitude to the magnitude of the data signal, a clock recoverer for recovering the clock signal from the transmission signal, using the extracted strobe signal, and a sampler for sampling the data signals included in the transmission signal in response to the recovered clock signal. The probability of generating a timing skew error in the time interval between a clock signal and a data signal is minimized. Even though the level of a common component might change, the clock signal can be recovered accurately and the size of the clock recovery circuit can be reduced.

Abstract: Embodiments relate to a quarter cycle delay clock generator. According to embodiments, a quarter cycle delay clock generator may include a reference clock generator to generate a reference clock signal, a first logic circuit to catch a first input signal input thereto at a rising edge of the reference clock signal and outputting a first input signal as a first output signal until a next rising edge of the reference clock signal, and a second logic circuit to catch a second input signal input thereto and outputting the second input signal as a second output signal. The first output signal may be inverted and input to the first logic circuit as the first input signal, and the second logic circuit may receive the first output signal from the first logic circuit as the second input signal.

Abstract: Embodiments relate to a start-up circuit for a reference voltage generation circuit. According to embodiments, a start-up circuit may include a start-up start unit allowing current to flow in the reference voltage generation circuit to initiate a start-up process in response to a start-up start signal, a reference current generation unit decreasing a variable voltage depending on whether the reference voltage generation circuit is started up and generating start-up reference current corresponding to the variable voltage, and a start-up controller detecting current flowing in the reference voltage generation circuit, comparing the detected result with the start-up reference current, and outputting the compared result as a start-up start signal. Current consumption may be decreased after start-up. A BRG circuit may be stably started up. If a high supply voltage is used, current consumption may decrease, and if a low supply voltage is used, a BGR circuit may be stably started up.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device includes a first conductive well region in a semiconductor substrate and a second conductive well region on or in the first conductive well region. A gate electrode is in a trench on a gate insulation layer, and the trench is in the second conductive region and the first conductive well region. A drain includes a drain insulation layer, a (polysilicon) shield layer, and drain plug. The drain insulation layer is in a trench in the second conductive region and the first conductive well region. The shield layer encloses the drain plug. A lower portion of the drain plug contacts the second conductive well region. A first conductive source region is at a side of the gate electrode.

Abstract: A semiconductor device, a method for fabricating the same, and a transformer circuit using the same are disclosed. The semiconductor device includes a trench metal oxide semiconductor (MOS) transistor for switching a load of current supplied from a power source, and a boost controller for controlling driving of the trench MOS transistor, the boost controller being formed with the trench MOS transistor on a single semiconductor device to form an integrated structure. In this structure, the physical space of the semiconductor device is reduced, thereby reducing the size of a DC-DC transformer circuit using the semiconductor device. It is possible to obtain finely-adjusted output values by controlling values of the ripple current and ripple voltage. A desired operational stability according to a variation in temperature can also be secured.

Abstract: A trench transistor and a manufacturing method for the same are disclosed. The manufacturing method includes preparing a semiconductor substrate, forming a trench in the semiconductor substrate, forming a gate oxide layer over an inner wall of the trench, forming a gate having a first conductivity type by embedding polysilicon in the trench, the gate including a protruding portion protruding over a surface of the semiconductor substrate, forming a barrier layer by implanting second conductivity type ions in the protruding portion, and forming a second conductivity type source region over the surface of the semiconductor substrate.

Abstract: Disclosed is a semiconductor device that can be used as a high voltage transistor. The semiconductor device can include a gate electrode on a semiconductor substrate, drift regions in the substrate at opposite sides of the gate electrode, a source region in one of the drift regions and a drain region in the other of the drift regions, and a shallow trench isolation (STI) region in a portion of the drift region between the gate electrode and the drain region. The portion of the drift region below the STI region can have a doping profile in which the concentration of impurities decreases from the concentration at the lower surface of the STI region, and then increases, and then again decreases.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device can provide a trench MOS transistor having an up-drain structure. The semiconductor device can include a first conductive type well in a semiconductor substrate, a second conductive type well on the first conductive type well, trenches formed by removing portions of the second conductive type well and the first conductive type well; gates provided in the trenches with a gate dielectric being between each gate and the walls of the trench, a first conductive type source region and a second conductive type body region on the second conductive type well, the first conductive type source region surrounding a lateral surface of the gate, and a common drain between the gates, the common drain being connected to the first conductive type well.