Patents by Inventor Cécile Jenny

Cécile Jenny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10128295
    Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: November 13, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
  • Publication number: 20180158861
    Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.
    Type: Application
    Filed: January 10, 2018
    Publication date: June 7, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
  • Publication number: 20180076250
    Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.
    Type: Application
    Filed: September 13, 2016
    Publication date: March 15, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
  • Patent number: 9917126
    Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
  • Patent number: 8053871
    Abstract: A metal barrier is realized on top of a metal portion of a semiconductor product, by forming a metal layer on the surface of the metal portion, with this metal layer comprising a cobalt-based metal material. Then, after an optional deoxidation step, a silicidation step and a nitridation step of the cobalt-based metal material of the metal layer are performed. The antidiffusion properties of copper atoms (for example) and the antioxidation properties of the metal barrier are improved.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: November 8, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: Pierre Caubet, Laurin Dumas, Cecile Jenny
  • Publication number: 20100155950
    Abstract: A metal barrier is realized on top of a metal portion of a semiconductor product, by forming a metal layer on the surface of the metal portion, with this metal layer comprising a cobalt-based metal material. Then, after an optional deoxidation step, a silicidation step and a nitridation step of the cobalt-based metal material of the metal layer are performed. The antidiffusion properties of copper atoms (for example) and the antioxidation properties of the metal barrier are improved.
    Type: Application
    Filed: August 7, 2009
    Publication date: June 24, 2010
    Applicant: STMicroelectronics S.A.
    Inventors: Laurin Dumas, Cécile Jenny, Pierre Caubet
  • Patent number: 7601636
    Abstract: A metal barrier is realized on top of a metal portion of a semiconductor product, by forming a metal layer on the surface of the metal portion, with this metal layer comprising a cobalt-based metal material. Then, after an optional deoxidation step, a silicidation step and a nitridation step of the cobalt-based metal material of the metal layer are performed. The antidiffusion properties of copper atoms (for example) and the antioxidation properties of the metal barrier are improved.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: October 13, 2009
    Assignee: STMicroelectronics S.A.
    Inventors: Laurin Dumas, Cécile Jenny, Pierre Caubet
  • Publication number: 20080088022
    Abstract: A metal barrier is realized on top of a metal portion of a semiconductor product, by forming a metal layer on the surface of the metal portion, with this metal layer comprising a cobalt-based metal material. Then, after an optional deoxidation step, a silicidation step and a nitridation step of the cobalt-based metal material of the metal layer are performed. The antidiffusion properties of copper atoms (for example) and the antioxidation properties of the metal barrier are improved.
    Type: Application
    Filed: October 12, 2007
    Publication date: April 17, 2008
    Applicant: STMicroelectronics S.A.
    Inventors: Laurin Dumas, Cecile Jenny, Pierre Caubet