Abstract: Problems forming silicided and nonsilicided structures on the same silicon substrate are overcome utilizing a spacer oxide masking technique. A protective spacer oxide layer is deposited over the entire silicon substrate surface, and a silicide exclusion photoresist mask is selectively developed to permit etching of the spacer oxide layer in unmasked regions where silicides are expected to be formed. Areas of silicon substrate revealed by etching of the spacer oxide layer are exposed to silicide-forming metals, and these silicide-forming metals react with the silicon substrate to produce silicides. Spacer oxide remaining in masked regions prevents formation of silicides in those regions.

Abstract: Silicon controlled rectifier (SCR) structures are provided that are triggered by lightly doped diffusion (LDD) junction breakdown voltages of approximately 4-10 V. The SCR structures eliminate the need for the field plate diode and resistor secondary protection elements found in conventional SCR-based ESD protection circuits, thus minimizing RC delay on the signal line and reducing circuit size. The SCR structures are compatible with existing CMOS processes and are scalable to submicron technology.