Patents by Inventor C. Walter Fenk

C. Walter Fenk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7649371
    Abstract: A method and apparatus for a thermal stratification test providing cyclical and steady-state stratified environments. In order to test an electronic device, for example one having one or more levels of ball-grid-array interconnections, e.g., connecting a chip to a flip-chip substrate and connecting the flip-chip substrate to a printed circuit board of a device, an apparatus and method are provided to heat one side of the device while cooling the second side. In some embodiments, the process is then reversed to cool the first side and heat the second. Some embodiments repeat the cycle of heat-cool-heat-cool several times, and then perform functional tests of the electronic circuitry. In some embodiments, the functional tests are performed in one or more thermal-stratification configurations after cycling at more extreme thermal stratification setups. In some embodiments, a test that emphasizes solder creep is employed.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: January 19, 2010
    Assignee: Intel Corporation
    Inventor: C. Walter Fenk
  • Patent number: 7202684
    Abstract: A method and apparatus for a thermal stratification test providing cyclical and steady-state stratified environments. In order to test an electronic device, for example one having one or more levels of ball-grid-array interconnections, e.g., connecting a chip to a flip-chip substrate and connecting the flip-chip substrate to a printed circuit board of a device, an apparatus and method are provided to heat one side of the device while cooling the second side. In some embodiments, the process is then reversed to cool the first side and heat the second. Some embodiments repeat the cycle of heat-cool-heat-cool several times, and then perform functional tests of the electronic circuitry. In some embodiments, the functional tests are performed in one or more thermal-stratification configurations after cycling at more extreme thermal stratification setups. In some embodiments, a test that emphasizes solder creep is employed.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: April 10, 2007
    Assignee: Intel Corporation
    Inventor: C. Walter Fenk
  • Patent number: 7196535
    Abstract: A method includes setting a first target temperature for an object that is in contact with a thermal medium, repeatedly receiving input that is indicative of a current temperature of the thermal medium, repeatedly estimating the temperature of the object based on the input, repeatedly setting a second target temperature for the thermal medium based on the estimated temperature of the object, and controlling the temperature of the thermal medium based on the second target temperature which has been set. Other embodiments are described and claimed.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: March 27, 2007
    Assignee: Intel Corporation
    Inventor: C. Walter Fenk
  • Publication number: 20040178808
    Abstract: A method and apparatus for a thermal stratification test providing cyclical and steady-state stratified environments. In order to test an electronic device, for example one having one or more levels of ball-grid-array interconnections, e.g., connecting a chip to a flip-chip substrate and connecting the flip-chip substrate to a printed circuit board of a device, an apparatus and method are provided to heat one side of the device while cooling the second side. In some embodiments, the process is then reversed to cool the first side and heat the second. Some embodiments repeat the cycle of heat-cool-heat-cool several times, and then perform functional tests of the electronic circuitry. In some embodiments, the functional tests are performed in one or more thermal-stratification configurations after cycling at more extreme thermal stratification setups. In some embodiments, a test that emphasizes solder creep is employed.
    Type: Application
    Filed: March 13, 2003
    Publication date: September 16, 2004
    Applicant: Intel Corporation
    Inventor: C. Walter Fenk