Abstract: An automatic circuit tester (10) includes a scanner bus (50) that includes series of signal-path links (70A-H, 72A-H) and connectors (51) into which scanner boards (46, 47) are plugged. Each scanner board includes switches (74A-H, 76A-H, and 78A-H) that in different states can (i) connect together the links on opposite sides of the scanner board so as to forward signals along the link sequence and (ii) connect the link on one side to an instrument (18) or system pin (24) while isolating the link on the other side from the first link and the instrument or system pin.

Abstract: An automatic circuit tester (10) employs a scanner (20) embodied in a group of interconnected main scanner boards (46, 47) that provide switching by means of mechanical relays. In order to provide a cross-point matrix and structure without unacceptable stub lengths, the relays are mounted on auxiliary boards (114) that extend transversely from the surface of each main board (46, 47). The main scanner boards plug into a scanner bus (50) in such a manner as to permit them to connect or disconnect adjacent links (70A-H, 72A-H) in sequences of links in the scanner bus (50).

Abstract: A time-measurment circuit (10) employs time-expansion circuits (13 and 14) to expand the initial and final portions of the duration of an event so as to measure more precisely those segments of time that typically are not integral numbers of clock periods in length. Each time-expansion circuit (13 and 14) employs a single capacitor (34), which it charges at a rapid rate during the initial or final time segment to be measured and then discharges at a much lower rate. The clock periods that occur during the time required for charging and discharging are counted, so the initial and final segments are measured with greatly enhanced resolution. An emitter-coupled-logic integrated circuit (54) performs the charging of the capacitor (34) by drawing current through its V.sub.CC1 l terminal ( 62).