Abstract: Arm electronics (AE) suitable for use in a disk drive are disclosed. The AE has write circuitry configured to operate the AE in a write mode during which a write mode supply current is drawn, and read circuitry configured to operate the AE in a read mode during which a read mode supply current is drawn. The AE uses a decaying current pulse generator that generates a decaying current pulse at the beginning of each write-to-read mode transition. The decaying current pulse has an initial value that is equal to the difference between the write mode supply current and the read mode supply current. This controlled load forces the AE to draw a gradually decreasing supply current for each write-to-read mode transition such that supply voltage transients (otherwise present due to parasitics in cabling between the AE and power supply) are reduced. Thus, the undesirable effects of such transients in the read circuitry are reduced so that write-to-read mode recovery times can be shortened.

Abstract: Arm electronics (AE) suitable for use in a disk drive are disclosed. The AE has write circuitry configured to operate the AE in a write mode during which a write mode supply current is drawn, and read circuitry configured to operate the AE in a read mode during which a read mode supply current is drawn. The AE uses a decaying current pulse generator that generates a decaying current pulse at the beginning of each write-to-read mode transition. The decaying current pulse has an initial value that is equal to the difference between the write mode supply current and the read mode supply current. This controlled load forces the AE to draw a gradually decreasing supply current for each write-to-read mode transition such that supply voltage transients (otherwise present due to parasitics in cabling between the AE and power supply) are reduced. Thus, the undesirable effects of such transients in the read circuitry are reduced so that write-to-read mode recovery times can be shortened.

Abstract: A method and apparatus for re-initializing a GMR head after losing initialization is disclosed. The invention may use a voltage controlled waveform, which allows the current to vary with the resistance of the GMR head. Furthermore, according to a further aspect of the invention a stack of GMR heads may be reinitialized having the same orientation to preclude inversion of the reset magnetic fields on half of the heads. In addition, improvements in re-initializing GMR heads is provided by implementing wave shaping. The invention can also provide re-initialization of GMR heads at different points in the manufacturing process.

Abstract: An FET write driver providing high rates of data transfer to a magnetic storage medium by effectively utilizing the voltage swing provided by supply voltage. A first and a second p-channel FET power switch are coupled between the voltage supply and the inductive head, each having a high aspect ratio for low resistance. A first and a second current mirror are coupled at their inputs to the inductive head and a current source, each current mirror having a reference arm coupled to the current source and a mirror arm coupled to the inductive head. Each current mirror has an output coupled respectively to a first and a second mirror enabling FET switch, each having a high aspect ratio for low resistance.

Abstract: A circuit forming part of an arm electronics module installed on an actuator arm that measures the voltage across an MR head A control unit supplies a measurement enable signal that enables a measurement enable circuit. A current bias circuit, responsive to the control unit, supplies a bias current to the MR head. A common node in the circuit provides a voltage signal responsive to the voltage across the MR head, with an added diode V.sub.BE drop across an input transistor. A voltage measurement amplifier has an input node and an output node that supplies an output voltage reduced in voltage by one diode drop (V.sub.BE). An input switch, responsive to the measurement enable signal is coupled between the input node and the common node. An output switch, responsive to the measurement enable signal is coupled between the output node and an output terminal.

Abstract: Circuitry for providing a high speed access by a swingable arm and a transducer carried thereby across a plurality of tracks on a rotatable data storage device to a target track on the rotatable device including a speed indicating circuit connected with the transducer for indicating the speed of the transducer in crossing tracks on the rotatable device and a switchable filter effectively between the transducer and said speed indicating circuit which has a high roll off as the transducer crosses the tracks at a high speed and has a low roll off as the transducer approaches the target track at a relatively low speed so as to thereby cause the speed indicating circuit to accurately indicate the speed of the transducer in moving across the tracks of the rotatable device.