Patents by Inventor Carl M. Ellison

Carl M. Ellison has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6795905
    Abstract: An access transaction generated by a processor is configured using a configuration storage containing a configuration setting. The processor has a normal execution mode and an isolated execution mode. The access transaction has access information. Access to the configuration storage is controlled. An access grant signal is generated using the configuration setting and the access information. The access grant signal indicates if the access transaction is valid.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: September 21, 2004
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Millind Mittal
  • Patent number: 6769058
    Abstract: A method, apparatus, and system for invoking a reset process in response to a logical processor being individually reset is disclosed. When a last logical processor operating within a platform in an isolated execution mode and associated with an isolated area of memory is reset, it is reset without clearing a cleanup flag. Subsequently, an initializing physical processor invokes an initialization process that determines that the cleanup flag is set. The initialization process invokes the execution of a processor nub loader, and if the cleanup flag is set, the processor nub loader scrubs the isolated area of memory and invokes a controlled close for the initializing physical processor which clears the cleanup flag. The initializing physical processor then re-performs the initialization process. Upon the second iteration of the initialization process, with the cleanup flag not set, a new clean isolated area of memory is created for the initializing physical processor.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: July 27, 2004
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, James A. Sutton, Shreekant S. Thakkar, Millind Mittal, Ken Reneris
  • Patent number: 6760441
    Abstract: The present invention is a method, apparatus, and system to generate a key hierarchy for use in an isolated execution environment of a protected platform. In order to bind secrets to particular code operating in isolated execution, a key hierarchy comprising a series of symmetric keys for a standard symmetric cipher is utilized. The protected platform includes a processor that is configured in one of a normal execution mode and an isolated execution mode. A key storage stores an initial key that is unique for the platform. A cipher key creator located in the protected platform creates the hierarchy of keys based upon the initial key. The cipher key creator creates a series of symmetric cipher keys to protect the secrets of loaded software code.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: July 6, 2004
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Millind Mittal
  • Patent number: 6754815
    Abstract: The present invention provides a method, apparatus, and system for invoking a reset process in response to a processor being individually reset. The reset processor operates within a platform in an isolated execution mode and is associated with an isolated area of memory. An initialization process is invoked for an initializing processor. The initialization process determines whether or not a cleanup flag is set. If the cleanup flag is set, the isolated area of memory is scrubbed. In one embodiment, when a last processor operating in the platform is reset, it is reset without clearing the cleanup flag. Subsequently, an initializing processor invokes the initialization process. The initialization process determines that the cleanup flag is set. The initialization process invokes the execution of a processor nub loader. If the cleanup flag is set, the processor nub loader scrubs the isolated area of memory and invokes a controlled close for the initializing processor.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: June 22, 2004
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Millind Mittal
  • Publication number: 20040109569
    Abstract: Protected content distribution is accomplished by a first entity generating a set of asymmetric key pairs, creating a plurality of sets of private keys by selecting a combination of private keys from the set of asymmetric key pairs for each created set, and distributing the sets of private keys to playback devices. A second entity produces protected content including encrypted content and a public key media key block, encrypts a symmetric content key with each public key in the set of asymmetric key pairs to form the public key media key block and encrypts a content title with the symmetric content key to form the encrypted content. A playback device stores one set of private keys, receives the protected content, and decrypts and plays the content title stored in the protected content when a selected one of the set of private keys stored by the playback device successfully decrypts the encrypted symmetric content key stored in the public key media key block of the received protected content.
    Type: Application
    Filed: December 10, 2002
    Publication date: June 10, 2004
    Inventors: Carl M. Ellison, Brendan Traw, Michael S. Ripley, Gary L. Graunke
  • Patent number: 6748366
    Abstract: A person-to-person electronic commerce system that protects the anonymity of buyers and sellers. Embodiments of the present invention interpose a trusted intermediary between the buyer and seller during the transaction fulfillment process. Buyer and seller may disclose their personal information to the trusted intermediary. The trusted intermediary then arranges payment and shipping on behalf of the parties. In this way, neither buyer nor seller need know anything about the other in order to fulfill the transaction.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: June 8, 2004
    Assignee: Intel Corporation
    Inventors: Roger A. Hurwitz, Tim M. Carver, Carl M. Ellison
  • Publication number: 20040078590
    Abstract: The present invention provides a method, apparatus, and system for controlling memory accesses to multiple memory zones in an isolated execution environment. A processor having a normal execution mode and an isolated execution mode generates an access transaction. The access transaction is configured using a configuration storage that stores configuration settings. The configuration settings include a plurality of subsystem memory range settings defining memory zones. The access transaction also includes access information. A multi-memory zone access checking circuit, coupled to the configuration storage, checks the access transaction using at least one of the configuration settings and the access information. The multi-memory zone access checking circuit generates an access grant signal if the access transaction is valid.
    Type: Application
    Filed: October 10, 2003
    Publication date: April 22, 2004
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Millind Mittal
  • Publication number: 20040025017
    Abstract: In one embodiment, a method for sensory verification comprises exchanging at least one data item with a computing unit and selecting a sequence number. Such selection may be accomplished by generation of the sequence number or manual entry by the user. Thereafter, a transformation is periodically performed on the data item, the sequence number and optionally a random value to produce a sequence of values, each value being used to produce a perceivable sensory element for comparison with another sensory element produced by another computing unit.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Inventors: Carl M. Ellison, Stephen H. Dohrmann, Edward C. Epp
  • Patent number: 6678825
    Abstract: The present invention provides a method, apparatus, and system for controlling memory accesses to multiple isolated memory areas in an isolated execution environment. A page manager is used to distribute a plurality of pages to a plurality of different areas of a memory, respectively. The memory is divided into non-isolated areas and isolated areas. The page manager is located in an isolated area of memory. Further, a memory ownership page table describes each page of memory and is also located in an isolated area of memory. The page manager assigns an isolated attribute to a page if the page is distributed to an isolated area of memory. On the other hand, the page manager assigns a non-isolated attribute to a page if the page is distributed to a non-isolated area of memory. The memory ownership page table records the attribute for each page. In one embodiment, a processor having a normal execution mode and an isolated execution mode generates an access transaction.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: January 13, 2004
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Millind Mittal
  • Patent number: 6633963
    Abstract: A processor having a normal execution mode and an isolated execution mode generates an access transaction. The access transaction is configured using a configuration storage that stores configuration settings. The configuration settings include a plurality of subsystem memory range settings defining memory zones. The access transaction also includes access information. A multi-memory zone access checking circuit, coupled to the configuration storage, checks the access transaction using at least one of the configuration settings and the access information. The multi-memory zone access checking circuit generates an access grant signal if the access transaction is valid.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: October 14, 2003
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Millind Mittal
  • Publication number: 20030061485
    Abstract: An arrangement is provided for authenticating the source of public key transmission. A physical channel between a sender and a receiver is established. The sender transmits data to the receiver through a data channel. Upon receiving the data, the receiver verifies with the sender via the physical channel that the data received is from the sender.
    Type: Application
    Filed: September 25, 2001
    Publication date: March 27, 2003
    Inventors: Ned M. Smith, Stephen H. Dohmann, Gregory F. Eastman, Ed C. Epp, Carl M. Ellison
  • Publication number: 20030014637
    Abstract: In one embodiment, a method for key verification through time varying item presentation based on a key hash result is described. The method comprises generating a key hash result partially based on both a global identifier provided from a source and an estimated current time at that source. After generating the key hash result, a first time-varying item is produced using the key hash result as an index for a table lookup or generated based on certain bit patterns forming the key hash result. Thereafter, the first time-varying item is presented for comparison with a second time-varying item being contemporaneously presented at the source. These computations are repeated, giving the impression of two views or instances of the same time-varying item. An attacker might be able to match one small portion of such a time sequence of presentations, by luck, but not any large portion of the sequence.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 16, 2003
    Inventors: Carl M. Ellison, Stephen H. Dohrmann
  • Patent number: 6507904
    Abstract: A technique is provided to execute isolated instructions according to an embodiment of the present invention. An execution unit executes an isolated instruction in a processor operating in a platform. The processor is configured in one of a normal execution mode and an isolated execution mode. A parameter storage containing at least one parameter to support execution of the isolated instruction when the processor is configured in the isolated execution mode.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: January 14, 2003
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Millind Mittal
  • Publication number: 20030005298
    Abstract: A method for authenticating ownership of cryptographic keys for use in secured digital communication includes creating a key pair. The public key of the key pair is hashed to create a hashed public key. A prover's business card is presented to a verifier with the hashed public key physically imprinted upon the business card. The business card is accepted by the verifier who simultaneously observes the physical characteristics of the prover. Distinguishing characteristics of the prover are associated with the hashed public key. The public key corresponding to the hashed public key is obtained.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventors: Ned M. Smith, Eric R. Dittert, Carl M. Ellison
  • Publication number: 20020157004
    Abstract: Enforcing authorization in a shared process between at least two parties by identifying a sender of a message requesting an action as part of the shared process, determining the party of the sender, associating the sender's party with a business relationship between the sender's party and the receiver's party as defined by an electronic contract (without relying on a trusted third party to provide a common rooted key hierarchy), identifying terms and conditions of the electronic contract corresponding to the shared process, and verifying that the requested action corresponds to the terms and conditions and is allowable for the shared process by the sender.
    Type: Application
    Filed: February 15, 2001
    Publication date: October 24, 2002
    Inventors: Ned M. Smith, Carl M. Ellison
  • Publication number: 20020144121
    Abstract: A signature key is generated in a secure platform. The secure platform has a processor configured in one of a normal execution mode and an isolated execution mode. A file checker is loaded into an isolated memory area accessible to the processor in the isolated execution mode. In isolated execution mode, a file checker performs a scan operation on the original file and produces a result. A signature associated with the scanned file is generated based on the result and using the signature key. The signature indicates file integrity.
    Type: Application
    Filed: March 30, 2001
    Publication date: October 3, 2002
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar
  • Publication number: 20020144140
    Abstract: A file is sent to a remote signing authority via a network. The signing authority checks the file and provides a signature indicating file integrity of the file. The signature returned from the signing authority via the network is verified.
    Type: Application
    Filed: March 30, 2001
    Publication date: October 3, 2002
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar
  • Patent number: 5991406
    Abstract: A system and method for data escrow cryptography are described. An encrypting user encrypts a message using a secret storage key (KS) and attaches a data recovery field (DRF), including an access rule index (ARI) and KS, to the encrypted message. The DRF and the encrypted message are stored in a storage device. To recover KS, a decrypting user extracts and sends the DRF to a data recovery center (DRC) that issues a challenge based on access rules (ARs) originally defined by the encrypting user. If the decrypting user meets the challenge, the DRC sends KS in a message to the decrypting user. Generally, KS need not be an encryption key but could represent any piece of confidential information that can fit inside the DRF. In all cases, the DRC limits access to decrypting users who can meet the challenge defined in either the ARs defined by the encrypting user or the ARs defined for override access.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: November 23, 1999
    Assignee: Network Associates, Inc.
    Inventors: Steven B. Lipner, David M. Balenson, Carl M. Ellison, Stephen T. Walker
  • Patent number: 5956403
    Abstract: A system and method for key escrow cryptography for use in a system comprising a sender and a receiver. Only public escrow keys are stored in the sender and the receiver. The sender encrypts a message using a secret session key (KS), and generates a leaf verification string (LVS) by combining an unique program identifier (UIP), a public portion of a program unique key (KUpub), and a signature. The sender encrypts the KS using the KUpub to generate a first encrypted session key (EKS), and generates a first law enforcement access field (LEAF) by encrypting a combination of the first EKS and the UIP with a copy of a public portion of a family key (KFpub) stored in the sender. The encrypted message, the LVS, and the first LEAF are transmitted from the sender to the receiver. The receiver stores therein a public portion of the KEPF key (KEPFpub). The receiver extracts the UIP, KUpub, and the signature from the LVS, and then encrypts the KS using the extracted KUpub to generate a second encrypted session key (EKS).
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: September 21, 1999
    Assignee: Network Association, Inc.
    Inventors: Steven B. Lipner, David M. Balenson, Carl M. Ellison, Stephen T. Walker
  • Patent number: 5745573
    Abstract: A system and method for data escrow cryptography are described. An encrypting user encrypts a message using a secret storage key (KS) and attaches a data recovery field (DRF), including an access rule index (ARI) and KS, to the encrypted message. The DRF and the encrypted message are stored in a storage device. To recover KS, a decrypting user extracts and sends the DRF to a data recovery center (DRC) that issues a challenge based on access rules (ARs) originally defined by the encrypting user. If the decrypting user meets the challenge, the DRC sends KS in a message to the decrypting user. Generally, KS need not be an encryption key but could represent any piece of confidential information that can fit inside the DRF. In all cases, the DRC limits access to decrypting users who can meet the challenge defined in either the ARs defined by the encrypting user or the ARs defined for override access.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: April 28, 1998
    Assignee: Trusted Information Systems, Inc.
    Inventors: Steven B. Lipner, David M. Balenson, Carl M. Ellison, Stephen T. Walker