Patents by Inventor Carl V. Reynolds
Carl V. Reynolds has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8203351Abstract: A probing apparatus can comprise a substrate, conductive signal traces, probes, and electromagnetic shielding. The substrate can have a first surface and a second surface opposite the first surface, and the electrically conductive first signal traces can be disposed on the first surface of the first substrate. The probes can be attached to the first signal traces, and the electromagnetic shielding structures can be disposed about the signal traces.Type: GrantFiled: May 19, 2010Date of Patent: June 19, 2012Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds, Takao Saeki, Yoichi Urakawa
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Patent number: 7898242Abstract: A probe card assembly can include an insert holder configured to hold a probe insert, which can include probes disposed in a particular configuration for probing a device to be tested. The probe card assembly can provide an electrical interface to a tester that can control testing of the device, and while attached to the probe card assembly, the insert holder can hold the probe insert such that the probe insert is electrically connected to electrical paths within the probe card assembly that are part of the interface to the tester. The insert holder can be detached from the probe card assembly. The probe insert of the probe card assembly can be replaced by detaching the insert holder, replacing the probe insert with a new probe insert, and then reattaching the insert holder to the probe card assembly. The probe insert and holder can be integrally formed and comprise a single structure that can be detached from a probe card assembly and replaced with a different probe insert and holder.Type: GrantFiled: March 3, 2009Date of Patent: March 1, 2011Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds, Nobuhiro Kawamata, Takao Saeki
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Patent number: 7843202Abstract: Methods and apparatus for testing semiconductor devices are provided herein. In some embodiments, an assembly for testing semiconductor devices can include a probe card assembly; and a thermal barrier disposed proximate an upper surface of the probe card assembly, the thermal barrier can restrict thermal transfer between tester side boundary conditions and portions of the probe card assembly disposed beneath the thermal barrier.Type: GrantFiled: September 28, 2007Date of Patent: November 30, 2010Assignee: FormFactor, Inc.Inventors: Eric D. Hobbs, Nobuhiro Kawamata, Andrew W. McFarland, Carl V. Reynolds, Yoichi Urakawa
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Publication number: 20100225344Abstract: A probing apparatus can comprise a substrate, conductive signal traces, probes, and electromagnetic shielding. The substrate can have a first surface and a second surface opposite the first surface, and the electrically conductive first signal traces can be disposed on the first surface of the first substrate. The probes can be attached to the first signal traces, and the electromagnetic shielding structures can be disposed about the signal traces.Type: ApplicationFiled: May 19, 2010Publication date: September 9, 2010Inventors: Benjamin N. Eldridge, Carl V. Reynolds, Takao Saeki, Yoichi Urakawa
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Patent number: 7724004Abstract: A probing apparatus can comprise a substrate, conductive signal traces, probes, and electromagnetic shielding. The substrate can have a first surface and a second surface opposite the first surface, and the electrically conductive first signal traces can be disposed on the first surface of the first substrate. The probes can be attached to the first signal traces, and the electromagnetic shielding structures can be disposed about the signal traces.Type: GrantFiled: December 1, 2006Date of Patent: May 25, 2010Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds, Takao Saeki, Yoichi Urakawa
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Publication number: 20100120267Abstract: Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements.Type: ApplicationFiled: January 19, 2010Publication date: May 13, 2010Inventors: Benjamin N. Eldridge, Carl V. Reynolds
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Patent number: 7649368Abstract: Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements.Type: GrantFiled: July 8, 2008Date of Patent: January 19, 2010Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds
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Publication number: 20090160432Abstract: A probe card assembly can include an insert holder configured to hold a probe insert, which can include probes disposed in a particular configuration for probing a device to be tested. The probe card assembly can provide an electrical interface to a tester that can control testing of the device, and while attached to the probe card assembly, the insert holder can hold the probe insert such that the probe insert is electrically connected to electrical paths within the probe card assembly that are part of the interface to the tester. The insert holder can be detached from the probe card assembly. The probe insert of the probe card assembly can be replaced by detaching the insert holder, replacing the probe insert with a new probe insert, and then reattaching the insert holder to the probe card assembly. The probe insert and holder can be integrally formed and comprise a single structure that can be detached from a probe card assembly and replaced with a different probe insert and holder.Type: ApplicationFiled: March 3, 2009Publication date: June 25, 2009Inventors: Benjamin N. Eldridge, Carl V. Reynolds, Nobuhiro Kawamata, Takao Saeki
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Publication number: 20090134897Abstract: Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.Type: ApplicationFiled: January 27, 2009Publication date: May 28, 2009Inventors: Timothy E. Cooper, Benjamin N. Eldridge, Carl V. Reynolds, Ravindra Vaman Shenoy
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Patent number: 7498825Abstract: A probe card assembly can include an insert holder configured to hold a probe insert, which can include probes disposed in a particular configuration for probing a device to be tested. The probe card assembly can provide an electrical interface to a tester that can control testing of the device, and while attached to the probe card assembly, the insert holder can hold the probe insert such that the probe insert is electrically connected to electrical paths within the probe card assembly that are part of the interface to the tester. The insert holder can be detached from the probe card assembly. The probe insert of the probe card assembly can be replaced by detaching the insert holder, replacing the probe insert with a new probe insert, and then reattaching the insert holder to the probe card assembly. The probe insert and holder can be integrally formed and comprise a single structure that can be detached from a probe card assembly and replaced with a different probe insert and holder.Type: GrantFiled: December 21, 2005Date of Patent: March 3, 2009Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds, Nobuhiro Kawamata, Takao Saeki
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Patent number: 7482822Abstract: Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.Type: GrantFiled: August 1, 2006Date of Patent: January 27, 2009Assignee: FormFactor, Inc.Inventors: Timothy E. Cooper, Benjamin N. Eldridge, Carl V. Reynolds, Ravindra Vaman Shenoy
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Patent number: 7479792Abstract: Methods are provided for making plated through holes usable for inserting and attaching connector probes. In a first method, a curved plated through hole is formed by bonding curved etchable wires to a first substrate, plating the wires with a non-etchable conductive material, encasing the plated wires with a dielectric material to form a second substrate, planing the second substrate to expose the etchable wire, and etching the wires to leave plated through holes. In a second method, wires coated with a first etchable layer are initially bonded to a substrate, a second non-etchable plating layer is then applied over the first layer, and the first layer is etched away leaving plated through holes with wires disposed inside.Type: GrantFiled: April 11, 2006Date of Patent: January 20, 2009Assignee: FormFactor, Inc.Inventors: Gaetan L. Mathieu, Igor Y. Khandros, Carl V. Reynolds
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Publication number: 20080265922Abstract: Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements.Type: ApplicationFiled: July 8, 2008Publication date: October 30, 2008Inventors: Benjamin N. Eldridge, Carl V. Reynolds
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Patent number: 7396236Abstract: Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements.Type: GrantFiled: March 16, 2001Date of Patent: July 8, 2008Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds
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Publication number: 20080132095Abstract: A interconnect structure is inexpensively manufactured and easily insertable into a socket. The interconnect structure is manufactured by forming a sacrificial substrate with cavities that is covered by a masking material having openings corresponding to the cavities. A first plating process is performed by depositing conductive material, followed by coupling wires within the openings and performing another plating process by depositing more conductive material. The interconnect structure is completed by first removing the masking material and sacrificial substrate. Ends of the wires are coupled opposite now-formed contact structures to a board. To complete the socket, a support device is coupled to the board to hold a tested integrated circuit.Type: ApplicationFiled: February 12, 2008Publication date: June 5, 2008Inventors: Igor Y. Khandros, Gaetan L. Mathieu, Carl V. Reynolds
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Patent number: 7330039Abstract: A interconnect structure is inexpensively manufactured and easily insertable into a socket. The interconnect structure is manufactured by forming a sacrificial substrate with cavities that is covered by a masking material having openings corresponding to the cavities. A first plating process is performed by depositing conductive material, followed by coupling wires within the openings and performing another plating process by depositing more conductive material. The interconnect structure is completed by first removing the masking material and sacrificial substrate. Ends of the wires are coupled opposite now-formed contact structures to a board. To complete the socket, a support device is coupled to the board to hold a tested integrated circuit.Type: GrantFiled: March 25, 2005Date of Patent: February 12, 2008Assignee: FormFactor, Inc.Inventors: Igor Y. Khandros, Gaetan L. Mathieu, Carl V. Reynolds
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Patent number: 7128587Abstract: The present invention discloses a cover over electrical contacts of a probe card used in testing die on a wafer. A testing machine is disclosed as having the covered probe card therein. Various mechanisms for uncovering the electrical contacts while it is located in the tester machine are disclosed.Type: GrantFiled: November 1, 2005Date of Patent: October 31, 2006Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds
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Patent number: 7084650Abstract: Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.Type: GrantFiled: December 16, 2002Date of Patent: August 1, 2006Assignee: FormFactor, Inc.Inventors: Timothy E. Cooper, Benjamin N. Eldridge, Carl V. Reynolds, Ravindra Vaman Shenoy
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Patent number: 7047638Abstract: A method of making a microelectronic spring contact array comprises forming a plurality of spring contacts on a sacrificial substrate and then releasing the spring contacts from the sacrificial substrate. Each of the spring contacts has an elongated beam having a base end. The method of making the array includes attaching the spring contacts at their base ends to a base substrate after they have been released entirely from the sacrificial substrate, so that each contact extends from the base substrate to a distal end of its beams. The distal ends are aligned with a predetermined array of tip positions. In an embodiment of the invention, the spring contacts are formed by patterning contours of the spring contacts in a sacrificial layer on the sacrificial substrate. The walls of patterned recesses in the sacrificial layer define side profiles of the spring contacts, and a conductive material is deposited in the recesses to form the elongated beams of the spring contacts.Type: GrantFiled: July 24, 2002Date of Patent: May 23, 2006Assignee: FormFactor, IncInventors: Benjamin N. Eldridge, Gaetan L. Mathieu, Carl V. Reynolds
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Patent number: 6960923Abstract: A probe card covering system includes a probe card for testing a die on a wafer, the probe card having contacts adapted for electrical engagement with the die; a removable cover connected to the probe card and positionable in a first position over the contacts of the probe card, the cover being movable to a second position exposing said contacts for the engagement with the die; and, wherein the cover is movable from the first position to the second position while the probe card is located in a wafer testing machine.Type: GrantFiled: December 19, 2001Date of Patent: November 1, 2005Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Carl V. Reynolds