Abstract: A method and system for patterning a substrate using a dual-tone development process is described. The method and system comprise using a resist material having a polymer backbone with a plurality of protecting groups attached thereto to improve process latitude and critical dimension uniformity for the dual-tone development process.

Abstract: A method and system for patterning a substrate using a dual tone development process is described. The method comprises use of plural photo-acid generators with or without a flood exposure of the substrate to improve process latitude for the dual tone development process.

Abstract: A method and system for patterning a substrate using a dual tone development process is described. The method comprises use of plural photo-acid generators with or without a flood exposure of the substrate to improve process latitude for the dual tone development process.

Abstract: A method and system for patterning a substrate using a lithographic process, such as a dual tone development process, is described. The method comprises use of at least one photo-activated acid enhancement component to improve process latitude for the dual tone development process.

Abstract: A method and system for patterning a substrate using a dual tone development process is described. The method and system comprise a flood exposure of the substrate to improve process latitude for the dual tone development process.

Abstract: A method and system for patterning a substrate using a dual-tone development process is described. The method and system comprise using a resist material having a polymer backbone with a plurality of protecting groups attached thereto to improve process latitude and critical dimension uniformity for the dual-tone development process.

Abstract: A method and system for patterning a substrate using a dual-tone development process is described. The method and system comprise using a resist material having a polymer backbone with a plurality of protecting groups attached thereto to improve process latitude and critical dimension uniformity for the dual-tone development process.

Abstract: A method of patterning a substrate using a dual-tone development process is described. The patterning method comprises forming a layer of radiation-sensitive material on a substrate, wherein the layer of radiation-sensitive material comprises a dual tone resist. Thereafter, the patterning method comprises performing one or more exposures of the layer of radiation-sensitive material to one or more patterns of radiation, wherein at least one of the one or more exposures comprises using a mask having a dual-tone mask pattern region configured for printing dual tone features and a half-tone mask pattern region configured for printing half-tone features. Furthermore, the half-tone mask pattern region is optimized for use with the dual tone resist.

Abstract: A method for patterning a substrate is described. In particular, the invention relates to a method for double patterning a substrate using dual tone development. Further, the invention relates to optimizing a dual tone development process.

Abstract: A method for patterning a substrate is described. In particular, the invention relates to a method for double patterning a substrate using dual tone development. Further, the invention relates to optimizing a dual tone development process.

Abstract: A method of designing an alternating phase shifting mask for projecting an image of an integrated circuit design having a plurality of spaced segments of critical dimension. The method initially identifies a phase universe boundary, such that the phase universe comprises a contiguous region of the integrated circuit layout wherein critical dimension segments within the phase universe are beyond a maximum phase interaction distance from any critical dimension segments outside the phase universe in accordance with predetermined design rules. The method then divides the phase universe into phase regions separated by the integrated circuit layout and any extensions of the critical dimension segments so that the phase regions are binary colorable within the phase universe.

Abstract: A method of designing an alternating phase shifting mask for projecting an image of an integrated circuit design having a plurality of spaced segments of critical dimension. The method initially identifies a phase universe boundary, such that the phase universe comprises a contiguous region of the integrated circuit layout wherein critical dimension segments within the phase universe are beyond a maximum phase interaction distance from any critical dimension segments outside the phase universe in accordance with predetermined design rules. The method then divides the phase universe into phase regions separated by the integrated circuit layout and any extensions of the critical dimension segments so that the phase regions are binary colorable within the phase universe.

Abstract: A method of designing a mask for imaging an integrated circuit (IC) design layout is provided to efficiently configure subresolution assist features (SRAFs) corresponding to an optimally configured annular illumination source of a lithographic projection system. A critical pitch is identified for the IC design, and optimal inner and outer radial coordinates of an annular illumination source are determined so that the resulting image projected through the mask will be optimized for the full range of pitches in the design layout. A relationship is provided for determining an optimal inner radius and outer radius for the annular illumination source. The number and placement of SRAFs are added to the mask design so that the resulting range of pitches substantially correspond to the critical pitch. The method of configuring SRAFs so that the image will have optimal characteristics, such as good contrast and good depth of focus, is fast.

Abstract: A method is described for designing an alternating phase shifted mask (altPSM) by optimally selecting the width of phase shapes. The selection of optimal phase shape widths is achieved by providing a lithography metric that describes the relationship between phase shape width and the target image dimension such that the metric, such as process window or across chip linewidth variation (ACLV), is optimized. In a preferred embodiment, ACLV is computed by Monte Carlo simulation by providing a set of error distributions for lithographic parameters such as focus, dose, lens aberrations, and the like. Alternatively, a lookup table of optimal phase widths associated with target image dimensions may be provided. The resulting altPSM is characterized by phase shapes having widths that vary according to the widths of the target image dimensions.

Abstract: A method is provided for designing an altPSM mask including a substrate. The method includes the following steps. Provide a circuit layout. Identify critical elements of the circuit layout. Provide a cutoff layout dimension. Identify critical segments of the circuit layout which are critical elements with a sub-cutoff dimension less than the cutoff dimension. Create basic phase shapes associated with the critical segments. Remove layout violations from the phase shapes. Determine whether the widths of phase shapes associated with a critical segment have unequal narrower and wider widths. If YES, then widen each narrower phase shape to match the width of wider phase shape associated with the critical segment and repeat the steps starting with removal of layout violations until the test answer is NO. When the test answer is NO, provide a layout pattern to an output.

Abstract: A method and apparatus for making phase shift masks are provided wherein an anti-reflective coating used on an opaque pattern layer of the mask fully covers the opaque pattern layer and has not been etched in the etching process to form the phase shift mask. A two-exposure method to form the phase shift mask is used wherein a photoresist having a defined dose-to-clear level is coated on the surface of the mask and the lower surface of the mask is exposed to a blanket exposure in an energy amount less than the dose-to-clear level. The open areas of the upper surface of the mask to be etched are exposed to an energy dose in an amount less than the dose-to-clear level, with the sum of the amounts of the lower surface energy and upper surface energy being at least the dose-to-clear level. The method and apparatus minimizes and/or avoids etching of the anti-reflective coating.

Abstract: A method and computer program product is described for optimizing the design of a circuit layout that assigns binary properties to the design elements according to a hierarchy of rules. For example, the design of an alternating phase shifted mask (altPSM) is optimized first according to rules that assign phase shapes that maximize image quality for critical circuit elements, and then further optimized to minimize mask manufacturability problems without significantly increasing the complexity of the design process flow. Further optimization of the design according to additional rules can be performed in a sequentially decreasing priority order. As the priority of rules decrease, some violation of lower priority rules may be acceptable, as long as higher priority rules are not violated.

Abstract: A method is described for designing an alternating phase shifted mask (altPSM) by optimally selecting the width of phase shapes. The selection of optimal phase shape widths is achieved by providing a lithography metric that describes the relationship between phase shape width and the target image dimension such that the metric, such as process window or across chip linewidth variation (ACLV), is optimized. In a preferred embodiment, ACLV is computed by Monte Carlo simulation by providing a set of error distributions for lithographic parameters such as focus, dose, lens aberrations, and the like. Alternatively, a lookup table of optimal phase widths associated with target image dimensions may be provided. The resulting altPSM is characterized by phase shapes having widths that vary according to the widths of the target image dimensions.

Abstract: A method of designing a mask for imaging an integrated circuit (IC) design layout is provided to efficiently configure subresolution assist features (SRAFs) corresponding to an optimally configured annular illumination source of a lithographic projection system. A critical pitch is identified for the IC design, and optimal inner and outer radial coordinates of an annular illumination source are determined so that the resulting image projected through the mask will be optimized for the full range of pitches in the design layout. A relationship is provided for determining an optimal inner radius and outer radius for the annular illumination source. The number and placement of SRAFs are added to the mask design so that the resulting range of pitches substantially correspond to the critical pitch. The method of configuring SRAFs so that the image will have optimal characteristics, such as good contrast and good depth of focus, is fast.

Abstract: A method of evaluating process effects of multiple exposure photolithographic processes by first determining a set of expected images for each exposure step or process of the multiple exposure process individually and then obtaining a composite set of images by sequentially perturbing images from a first or previous exposure step by weighted images from the subsequent exposure step. Preferably, the expected images are determined by simulation in the form of normalized aerial images over a range of defocus for each exposure step, and the weighting factor used is the dose-ratio of the subsequent exposure dose to the prior step exposure dose. The resulting composite set of images may be used to evaluate multiple exposure processes, for example, to provide an estimate of yield for a given budget of dose and focus errors, or alternatively, to provide specifications for tool error budgets required to obtain a target yield.