Patents by Inventor Carlton Washburn

Carlton Washburn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8968989
    Abstract: The present invention provides novel methods of fabricating microelectronics structures, and the resulting structures formed thereby, using EUV lithographic processes. The method involves utilizing an assist layer immediately below the photoresist layer. The assist layer can either be directly applied to the substrate, or it can be applied to any intermediate layer(s) that may be applied to the substrate. The preferred assist layers are formed from spin-coatable, polymeric compositions. The inventive method allows reduced critical dimensions to be achieved with improved dose-to-size ratios, while improving adhesion and reducing or eliminating pattern collapse issues.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: March 3, 2015
    Assignee: Brewer Science Inc.
    Inventors: Tantiboro Ouattara, Carlton Washburn, Vandana Krishnamurthy, Douglas Guerrero, Aline Collin
  • Patent number: 7602066
    Abstract: A method of forming via-first, dual damascene interconnect structures by using a gap-filling, bottom anti-reflective coating material whose thickness is easily controlled by a solvent is provided. After application to a substrate, the bottom anti-reflective coating is partially cured by baking at a low temperature. Next, a solvent is dispensed over the coated wafer and allowed to contact the coating for a period of time. The solvent removes the bottom anti-reflective coating at a rate controlled by the bottom anti-reflective coating's bake temperature and the solvent contact time to yield a bottom anti-reflective coating thickness that is thin, while maintaining optimum light-absorbing properties on the dielectric stack. In another possible application of this method, sufficient bottom anti-reflective coating may be removed to only partially fill the vias in order to protect the bottoms of the vias during subsequent processing.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: October 13, 2009
    Assignee: Brewer Science Inc.
    Inventors: Nickolas L. Brakensiek, Carlton A. Washburn, Earnest C. Murphy
  • Patent number: 7364835
    Abstract: Wet-recess (develop) gap-fill and bottom anti-reflective coatings based on a polyamic acid or polyester platform are provided. The polyamic acid platform allows imidization to form a polyimide when supplied with thermal energy. The gap-fill and bottom anti-reflective coatings are soluble in standard aqueous developers, and are useful for patterning via holes and trenches on semiconductor substrates in a dual damascene patterning scheme. In one embodiment, compositions composed of polyamic acids can be used as gap-filling (via-filling) materials having no anti-reflective function in a copper dual damascene process to improve iso-dense fill bias across different via arrays. In another embodiment, the same composition can be used for anti-reflective purposes, wherein the photoresist can be directly coated over the recessed surface, while it also acts as a fill material to planarize via holes on the substrate.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: April 29, 2008
    Assignee: Brewer Science Inc.
    Inventors: Mandar Bhave, Carlton A. Washburn, Rama Puligadda, Kevin Edwards
  • Patent number: 7348281
    Abstract: A method of forming via-first, dual damascene interconnect structures by using a gap-filling, bottom anti-reflective coating material whose thickness is easily controlled by a solvent is provided. After application to a substrate, the bottom anti-reflective coating is partially cured by baking at a low temperature. Next, a solvent is dispensed over the coated wafer and allowed to contact the coating for a period of time. The solvent removes the bottom anti-reflective coating at a rate controlled by the bottom anti-reflective coating's bake temperature and the solvent contact time to yield a bottom anti-reflective coating thickness that is thin, while maintaining optimum light-absorbing properties on the dielectric stack. In another possible application of this method, sufficient bottom anti-reflective coating may be removed to only partially fill the vias in order to protect the bottoms of the vias during subsequent processing.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: March 25, 2008
    Assignee: Brewer Science Inc.
    Inventors: Nickolas L. Brakensiek, Carlton A. Washburn, Earnest C. Murphy
  • Publication number: 20070123036
    Abstract: A method of forming via-first, dual damascene interconnect structures by using a gap-filling, bottom anti-reflective coating material whose thickness is easily controlled by a solvent is provided. After application to a substrate, the bottom anti-reflective coating is partially cured by baking at a low temperature. Next, a solvent is dispensed over the coated wafer and allowed to contact the coating for a period of time. The solvent removes the bottom anti-reflective coating at a rate controlled by the bottom anti-reflective coating's bake temperature and the solvent contact time to yield a bottom anti-reflective coating thickness that is thin, while maintaining optimum light-absorbing properties on the dielectric stack. In another possible application of this method, sufficient bottom anti-reflective coating may be removed to only partially fill the vias in order to protect the bottoms of the vias during subsequent processing.
    Type: Application
    Filed: January 31, 2007
    Publication date: May 31, 2007
    Inventors: Nickolas Brakensiek, Carlton Washburn, Earnest Murphy
  • Publication number: 20050148170
    Abstract: Wet-recess (develop) gap-fill and bottom anti-reflective coatings based on a polyamic acid or polyester platform are provided. The polyamic acid platform allows imidization to form a polyimide when supplied with thermal energy. The gap-fill and bottom anti-reflective coatings are soluble in standard aqueous developers, and are useful for patterning via holes and trenches on semiconductor substrates in a dual damascene patterning scheme. In one embodiment, compositions composed of polyamic acids can be used as gap-filling (via-filling) materials having no anti-reflective function in a copper dual damascene process to improve iso-dense fill bias across different via arrays. In another embodiment, the same composition can be used for anti-reflective purposes, wherein the photoresist can be directly coated over the recessed surface, while it also acts as a fill material to planarize via holes on the substrate.
    Type: Application
    Filed: October 15, 2004
    Publication date: July 7, 2005
    Inventors: Mandar Bhave, Carlton Washburn, Rama Puligadda, Kevin Edwards
  • Publication number: 20050118800
    Abstract: A method of forming via-first, dual damascene interconnect structures by using a gap-filling, bottom anti-reflective coating material whose thickness is easily controlled by a solvent is provided. After application to a substrate, the bottom anti-reflective coating is partially cured by baking at a low temperature. Next, a solvent is dispensed over the coated wafer and allowed to contact the coating for a period of time. The solvent removes the bottom anti-reflective coating at a rate controlled by the bottom anti-reflective coating's bake temperature and the solvent contact time to yield a bottom anti-reflective coating thickness that is thin, while maintaining optimum light-absorbing properties on the dielectric stack. In another possible application of this method, sufficient bottom anti-reflective coating may be removed to only partially fill the vias in order to protect the bottoms of the vias during subsequent processing.
    Type: Application
    Filed: September 16, 2004
    Publication date: June 2, 2005
    Inventors: Nickolas Brakensiek, Carlton Washburn, Earnest Murphy