Abstract: A device in a server having a processor and a storage. The device has a downstream communication unit configured to receive a data packet. The device also has a protocol blind network path indication unit configured to obtain an indicator corresponding to a predetermined path to a data communication unit in the network, by accessing the protocol blind correlation structure using a destination address of the data packet. The device, furthermore, has an upstream communication unit configured to transmit a network protocol blind packet including the data packet and the indicator corresponding to the predetermined data path to the data communication unit in the network. The device also includes a combiner configured to bind the indicator to the data packet received by the downstream communication unit.

Abstract: A first network device includes a first port to provide first data traffic to a first storage area network, a second port to provide second data traffic to a local area network, and memory shared between the first port and the second port to temporarily store the first data traffic in N first buffers and the second data traffic in M second buffers. A queue control module allocates a first memory space of the N first buffers to the first port and a second memory space of the M second buffers to the second port. An adjustment module adjusts a first amount of the first memory space and a second amount of the second memory space in response to a congestion event is caused by a first data traffic. Up to all of the first memory space and the second memory space is allocated to the N first buffers.

Abstract: Aspects of the disclosure provide a network device. The network device includes a first port coupled to a first device to communicate with the first device, and a clock wander compensation module. The first port recovers a first clock based on first signals received from the first device. The clock wander compensation module includes a global counter configured to count system clock cycles based on a system clock of the network device, and a first port counter configured to count first clock cycles based on the recovered first clock. Further, the first port transmits a first pause frame to the first device based on the global counter and the first port counter.

Abstract: In a memory management system, data packets received by input ports are stored in a circular buffer and queues associated with output ports. To preserve the packets stored in the buffer and prevent a head-drop event from occurring, a lossless system control component sends flow control commands when the difference between the oldest read pointer and the write pointer is less than a configurable transmission off threshold. The flow control commands pause the transmission of data packets to the input ports while enabling output ports to transmit stored data packets. When the difference between the oldest read pointer and the write pointer exceeds a configurable transmission on threshold, the lossless system controller ceases issuing flow control commands, and the input ports can resume receiving data packets.

Abstract: In a memory device having a set of memory banks to store content data, at least two requests to perform respective memory operations in a first memory bank are received during a single clock cycle. One or more of the at least two requests is blocked from accessing the first memory bank, and in response: redundancy data associated with the first memory bank and different from content data stored therein is accessed, and, without accessing the first memory bank, at least a portion of the content data stored in the first memory bank is reconstructed based on the associated redundancy data. A first memory operation is performed using the content data stored in the first memory bank, and a second memory operation is performed using content data reconstructed i) without accessing the first memory bank and ii) based on the associated redundancy data.

Abstract: A method of controlling a plurality of forwarding databases provided in an Ethernet bridge having a plurality of devices. The method includes aging a first set of entries in a first forwarding database maintained by a first one of the plurality of devices. The first set of entries are owned by the first one of the plurality of devices. The method also includes transmitting one or more new address messages from the first one of the plurality of devices to a second one of the plurality of devices. The method further includes aging a second set of entries in the first forwarding database. The second set of entries are owned by the second one of the plurality of devices.

Abstract: A network device adapted to process data packet traffic over a telecommunication network. The network device includes an ingress pipeline adapted to receive a data packet at a port of the network device. According to embodiments of the present invention, the data packet is characterized by an external QoS attribute having M bits. The network device also includes a processor adapted to form an internal QoS Profile associated with the data packet. The internal QoS Profile includes a QoS Profile Index having M+N bits and M and N are internally assigned. The processor is also adapted to process the data packet through the network device.

Abstract: An embodiment of the present invention reduces certain memory bandwidth requirements when sending a multicast message from a network device such as a router, bridge or switch. Separate output buffers are provided for different groups of egress ports, and incoming messages are written to some or all of the output buffers. A processing determination is made as to which egress ports will forward the message. Buffers associated with non-forwarding ports are released and the message is queued at the forwarding egress ports. When the message is forwarded, data is read from the output buffers associated with the forwarding egress ports.

Abstract: A packet processor includes a forwarding table configured to store address prefixes and a search engine configured to receive a packet and to search the forwarding table. The search engine includes a set bit counter configured to receive an address of the packet, to count set bits of a first bit vector associated with the packet, and to output a number of the set bits. A next hop table is configured to store a next hop pointer. A next bucket pointer receives the number of set bits and outputs one of the next hop pointers and the next bucket pointer based on the number of set bits.

Abstract: Packets or cells of variable lengths arriving at a multitude of input ports of a crossbar switch are stored in the input buffers associated with the input ports. Each input buffer includes a number of banks defined by a ratio of a preselected size to the smallest packet size. Each bank is configured to store a packet having the smallest size. The packets so stored in the buffers are subsequently transferred and stored in a memory shared by all the input and output buffers. The packets are stored along the depth of the shared memory, therefore, during each packet transmission period, a portion of each one of the packets is transferred and stored in the same addressable storage location of the share memory. Each portion includes one or more bits carried by the packet.

Abstract: Resources allocated to a group of ports include a plurality of storage regions. Each storage region includes a committed area and a shared area. A destination storage region is identified for a packet. A packet queuing engine stores the packet in the committed area of the determined destination storage region if it has a first drop precedence value, and if available storage space in the committed area exceeds a first threshold. The packet queuing engine stores the packet in the shared area of the determined destination storage region if the packet is not stored in the committed area, and if available storage space exceeds a second threshold defined by the packet's drop precedence value. If the packet is not stored either in the committed or shared area, it may be dropped.

Abstract: A logical load-balancing method for distributing traffic according to a set of weights among a group of network interfaces. A logical identity of a packet may be generated, e.g., by generating a hash index of the packet's header. Each of the weights may be associated with a network interface. A range of logical identities, or its boundary, may be determined for an interface according to the weight associated with the interface member. A packet may be directed to an interface if the packet's logical identify falls into the range of the interface.

Abstract: A system and method of managing data packets for transmission in a virtual network are disclosed. In some implementations, a network switch may generally comprise a packet modifier that modifies a VLAN tag state of a packet to be egressed as a function of an egress interface and a VLAN-ID assignment. The modified VLAN tag state may include one or more VLAN tags that are in a different order, or that have a different content, in comparison to the VLAN tags of the packet at the time of ingress.

Abstract: A method of processing packets and a network device are disclosed. Packets are received from separate ingress processing pipelines during a processing cycle. Control information for each packet is retrieved from one or more databases serving each pipeline and used to perform operations representative of different processing outcomes. Results of the operations are selected and used to update the databases, in some cases, based upon whether a relationship is detected between the packets.

Abstract: Apparatus having corresponding methods and computer programs comprise: an ingress circuit to receive a plurality of data flows, wherein each data flow includes packets of data having a desired order of transmission; an unshaped queue; one or more shaped queues; a forwarding engine to transfer the packets in each data flow from the ingress circuit to the unshaped queue when a shaping flag for the respective data flow is not set, and to transfer the packets in each data flow from the ingress circuit to a corresponding shaped queue when the shaping flag for the respective data flow is set; an egress circuit to transmit the packets; and a scheduler to dequeue the packets from the unshaped queue to the egress circuit, and to dequeue the packets from each shaped queue to the egress circuit only when no packets for the respective data flow remain in the unshaped queue.

Abstract: A network device adapted to process data packet traffic over a telecommunication network. The network device includes an ingress pipeline adapted to receive a data packet at a port of the network device. According to embodiments of the present invention, the data packet is characterized by an external QoS attribute having M bits. The network device also includes a processor adapted to form an internal QoS Profile associated with the data packet. The internal QoS Profile includes a QoS Profile Index having M+N bits and M and N are internally assigned. The processor is also adapted to process the data packet through the network device.

Abstract: A network switch includes a matching device that employs a first data structure to select one of N address groups including a first partial address of an IP packet. An action table selects one of a next hop location corresponding to a longest prefix match and a first matching operation for the IP packet based on the selected one of the N groups. When the first matching operation is selected, the matching device employs a second data structure to select one of M address groups including a second partial address of the IP packet. The action table selects one of a next hop location corresponding to a longest prefix match and a second matching operation for the IP packet based on the selected one of the M groups. A routing engine routes the IP packet based on the first and second next hop locations.

Abstract: A system and method of managing data packets for transmission in a virtual network are disclosed. In some implementations, a network switch may generally comprise a packet modifier that modifies a VLAN tag state of a packet to be egressed as a function of an egress interface and a VLAN-ID assignment. The modified VLAN tag state may include one or more VLAN tags that are in a different order, or that have a different content, in comparison to the VLAN tags of the packet at the time of ingress.

Abstract: Resources allocated to a group of ports include a plurality of storage regions. Each storage region includes a committed area and a shared area. A destination storage region is identified for a packet. A packet queuing engine stores the packet in the committed area of the determined destination storage region if it has a first drop precedence value, and if available storage space in the committed area exceeds a first threshold. The packet queuing engine stores the packet in the shared area of the determined destination storage region if the packet is not stored in the committed area, and if available storage space exceeds a second threshold defined by the packet's drop precedence value. If the packet is not stored either in the committed or shared area, it may be dropped.

Abstract: A search engine improves search speed and reduces required memory for a longest prefix matching (LPM) router that routes packets using IP addresses. The search engine includes a first bit vector with set bits corresponding to address ranges. A set bit counter counts the set bits in the bit vector based on a first portion of the address of the a first packet. A first next hop table contains first pointers for each of the set bits. One of the first pointers is selected based on a number of set bits counted by the set bit counter. For longer addresses, the addresses are split into address portions. The search engine includes a trie data structure that has n levels. The n levels of the trie data structure include nodes representing non-overlapping address space.