Abstract: A street-level imagery acquisition and selection process identifies which images are published in a street field view. An imagery database includes panoramas each corresponding to a set of images acquired from a single viewpoint. The panoramas are attached to corresponding positions on a road network graph. The graph is divided into a set of selection paths, each of which includes a topologically linear sequence of road segments. Each selection path is evaluated to select a set of panoramas to be published in the path. Panoramas of interior road segments are selected before panoramas at intersections. Selected panorama identifiers for each interior road segment of the selection paths and each intersection correspond to a position along the road network graph. The selected panorama identifiers are then published in the street field view.

Abstract: A street-level imagery acquisition and selection process identifies which images are published in a street field view. An imagery database includes panoramas each corresponding to a set of images acquired from a single viewpoint. The panoramas are attached to corresponding positions on a road network graph. The graph is divided into a set of selection paths, each of which includes a topologically linear sequence of road segments. Each selection path is evaluated to select a set of panoramas to be published in the path. Panoramas of interior road segments are selected before panoramas at intersections. Selected panorama identifiers for each interior road segment of the selection paths and each intersection correspond to a position along the road network graph. The selected panorama identifiers are then published in the street field view.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A processing system may receive an example image for use in querying a collection of digital images. The processing system may use local and global feature descriptors to perform a content-based image comparison of the digital images with the example image, to automatically rank the digital images with respect to similarity to the example image. A local feature descriptor may represent a portion of the contents of a digital image. A global feature descriptor may represent substantially all of the contents of that digital image. The global feature descriptor may be content based, not keyword based. Intermediate and final classifiers may be used to perform the automatic ranking. Different intermediate classifiers may generate intermediate relevance metrics with respect to different modalities. The final classifier may use results from the intermediate classifiers to produce a final relevance metric for the digital images. Other embodiments are described and claimed.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-subtract operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-subtract operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A processing system may receive an example image for use in querying a collection of digital images. The processing system may use local and global feature descriptors to perform a content-based image comparison of the digital images with the example image, to automatically rank the digital images with respect to similarity to the example image. A local feature descriptor may represent a portion of the contents of a digital image. A global feature descriptor may represent substantially all of the contents of that digital image. The global feature descriptor may be content based, not keyword based. Intermediate and final classifiers may be used to perform the automatic ranking. Different intermediate classifiers may generate intermediate relevance metrics with respect to different modalities. The final classifier may use results from the intermediate classifiers to produce a final relevance metric for the digital images. Other embodiments are described and claimed.

Abstract: An image retrieval program (IRP) may be used to query a collection of digital images. The IRP may include a mining module to use local and global feature descriptors to automatically rank the digital images in the collection with respect to similarity to a user-selected positive example. Each local feature descriptor may represent a portion of an image based on a division of that image into multiple portions. Each global feature descriptor may represent an image as a whole. A user interface module of the IRP may receive input that identifies an image as the positive example. The user interface module may also present images from the collection in a user interface in a ranked order with respect to similarity to the positive example, based on results of the mining module. Query concepts may be saved and reused. Other embodiments are described and claimed.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.