Patents by Inventor Carson Brownlee
Carson Brownlee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11915459Abstract: Apparatus and method for context-aware compression. For example, one embodiment of an apparatus comprises: ray traversal/intersection circuitry to traverse rays through a hierarchical acceleration data structure to identify intersections between rays and primitives of a graphics scene; matrix compression circuitry/logic to compress hierarchical transformation matrices to generate compressed hierarchical transformation matrices by quantizing N-bit floating point data elements associated with child transforms of the hierarchical transformation matrices to variable-bit floating point numbers or integers comprising offsets from a parent transform of the child transform; and an instance processor to generate a plurality of instances of one or more base geometric objects in accordance with the compressed hierarchical transformation matrices.Type: GrantFiled: May 10, 2022Date of Patent: February 27, 2024Assignee: INTEL CORPORATIONInventors: Carson Brownlee, Carsten Benthin, Joshua Barczak, Kai Xiao, Michael Apodaca, Prasoonkumar Surti, Thomas Raoux
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Patent number: 11900523Abstract: Apparatus and method for bottom-up BVH refit. For example, one embodiment of an apparatus comprises: a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes; traversal hardware logic to traverse one or more rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node unit comprising circuitry and/or logic to perform refit operations on nodes of the hierarchical acceleration data structure, the refit operations to adjust spatial dimensions of one or more of the nodes; and an early termination evaluator to determine whether to proceed with refit operations or to terminate refit operations for a current node based on refit data associated with one or more child nodes of the current node.Type: GrantFiled: October 19, 2021Date of Patent: February 13, 2024Assignee: Intel CorporationInventors: Kai Xiao, Michael Apodaca, Carson Brownlee, Thomas Raoux, Joshua Barczak, Gabor Liktor
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Publication number: 20230137438Abstract: An apparatus and method to execute ray tracing instructions. For example, one embodiment of an apparatus comprises execution circuitry to execute a dequantize instruction to convert a plurality of quantized data values to a plurality of dequantized data values, the dequantize instruction including a first source operand to identify a plurality of packed quantized data values in a source register and a destination operand to identify a destination register in which to store a plurality of packed dequantized data values, wherein the execution circuitry is to convert each packed quantized data value in the source register to a floating point value, to multiply the floating point value by a first value to generate a first product and to add the first product to a second value to generate a dequantized data value, and to store the dequantized data value in a packed data element location in the destination register.Type: ApplicationFiled: December 29, 2022Publication date: May 4, 2023Inventors: Karthik VAIDYANATHAN, Michael APODACA, Thomas RAOUX, Carsten BENTHIN, Kai XIAO, Carson BROWNLEE, Joshua BARCZAK
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Patent number: 11568591Abstract: An apparatus and method to execute ray tracing instructions. For example, one embodiment of an apparatus comprises execution circuitry to execute a dequantize instruction to convert a plurality of quantized data values to a plurality of dequantized data values, the dequantize instruction including a first source operand to identify a plurality of packed quantized data values in a source register and a destination operand to identify a destination register in which to store a plurality of packed dequantized data values, wherein the execution circuitry is to convert each packed quantized data value in the source register to a floating point value, to multiply the floating point value by a first value to generate a first product and to add the first product to a second value to generate a dequantized data value, and to store the dequantized data value in a packed data element location in the destination register.Type: GrantFiled: August 18, 2020Date of Patent: January 31, 2023Assignee: INTEL CORPORATIONInventors: Karthik Vaidyanathan, Michael Apodaca, Thomas Raoux, Carsten Benthin, Kai Xiao, Carson Brownlee, Joshua Barczak
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Patent number: 11562468Abstract: Apparatus and method for denoising of images generated by a rendering engine such as a ray tracing engine. For example, one embodiment of a system or apparatus comprises: A system comprising: a plurality of nodes to perform ray tracing operations; a dispatcher node to dispatch graphics work to the plurality of nodes, each node to perform ray tracing to render a region of an image frame; at least a first node of the plurality comprising: a ray-tracing renderer to perform ray tracing to render a first region of the image frame; and a denoiser to perform denoising of the first region using a combination of data associated with the first region and data associated with a region outside of the first region, at least some of the data associated with the region outside of the first region to be retrieved from at least one other node.Type: GrantFiled: February 9, 2021Date of Patent: January 24, 2023Assignee: INTEL CORPORATIONInventors: Carson Brownlee, Ingo Wald, Attila Afra, Johannes Guenther, Jefferson Amstutz, Carsten Benthin
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Patent number: 11527035Abstract: Real time ray tracing-based adaptive multi frequency shading. For example, one embodiment of an apparatus comprising: rasterization hardware logic to process input data for an image in a deferred rendering pass and to responsively update one or more graphics buffers with first data to be used in a subsequent rendering pass; ray tracing hardware logic to perform ray tracing operations using the first data to generate reflection ray data and to store the reflection ray data in a reflection buffer; and image rendering circuitry to perform texture sampling in a texture buffer based on the reflection ray data in the reflection buffer to render an output image.Type: GrantFiled: May 5, 2021Date of Patent: December 13, 2022Assignee: Intel CorporationInventors: Carson Brownlee, Gabor Liktor, Joshua Barczak, Kai Xiao, Michael Apodaca, Thomas Raoux
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Patent number: 11501484Abstract: Apparatus and method for acceleration data structure refit. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes including inner nodes and leaf nodes stored in a memory in a depth-first search (DFS) order; traversal hardware logic to traverse one or more of the rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node refit unit comprising circuitry and/or logic to read consecutively through at least the inner nodes in the memory in reverse DFS order to perform a bottom-up refit operation on the hierarchical acceleration data structure.Type: GrantFiled: September 25, 2020Date of Patent: November 15, 2022Assignee: INTEL CORPORATIONInventors: Michael Apodaca, Carsten Benthin, Kai Xiao, Carson Brownlee, Timothy Rowley, Joshua Barczak, Travis Schluessler
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Publication number: 20220343554Abstract: Apparatus and method for context-aware compression. For example, one embodiment of an apparatus comprises: ray traversal/intersection circuitry to traverse rays through a hierarchical acceleration data structure to identify intersections between rays and primitives of a graphics scene; matrix compression circuitry/logic to compress hierarchical transformation matrices to generate compressed hierarchical transformation matrices by quantizing N-bit floating point data elements associated with child transforms of the hierarchical transformation matrices to variable-bit floating point numbers or integers comprising offsets from a parent transform of the child transform; and an instance processor to generate a plurality of instances of one or more base geometric objects in accordance with the compressed hierarchical transformation matrices.Type: ApplicationFiled: May 10, 2022Publication date: October 27, 2022Inventors: Carson BROWNLEE, Carsten BENTHIN, Joshua BARCZAK, Kai XIAO, Michael APODACA, Prasoonkumar SURTI, Thomas RAOUX
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Patent number: 11436785Abstract: An apparatus and method for compressing ray tracing data prior to transmission between nodes. For example, one embodiment of an apparatus comprises: a first node comprising a first ray tracing engine, the first node communicatively coupled to a second node comprising a second ray tracing engine; first compression circuitry coupled to the first ray tracing engine, the first compression circuitry to perform compression on ray tracing data of the first ray tracing engine to produce a first compressed stream of ray tracing data; and interface circuitry to transmit the first compressed stream of ray tracing data from the first node to the second node.Type: GrantFiled: April 6, 2021Date of Patent: September 6, 2022Assignee: INTEL CORPORATIONInventors: Ingo Wald, Gabor Liktor, Carsten Benthin, Carson Brownlee, Johannes Guenther, Jefferson D. Amstutz
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Patent number: 11335035Abstract: Apparatus and method for context-aware compression. For example, one embodiment of an apparatus comprises: ray traversal/intersection circuitry to traverse rays through a hierarchical acceleration data structure to identify intersections between rays and primitives of a graphics scene; matrix compression circuitry/logic to compress hierarchical transformation matrices to generate compressed hierarchical transformation matrices by quantizing N-bit floating point data elements associated with child transforms of the hierarchical transformation matrices to variable-bit floating point numbers or integers comprising offsets from a parent transform of the child transform; and an instance processor to generate a plurality of instances of one or more base geometric objects in accordance with the compressed hierarchical transformation matrices.Type: GrantFiled: August 26, 2020Date of Patent: May 17, 2022Assignee: INTEL CORPORATIONInventors: Carson Brownlee, Carsten Benthin, Joshua Barczak, Kai Xiao, Michael Apodaca, Prasoonkumar Surti, Thomas Raoux
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Publication number: 20220108518Abstract: Apparatus and method for bottom-up BVH refit. For example, one embodiment of an apparatus comprises: a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes; traversal hardware logic to traverse one or more rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node unit comprising circuitry and/or logic to perform refit operations on nodes of the hierarchical acceleration data structure, the refit operations to adjust spatial dimensions of one or more of the nodes; and an early termination evaluator to determine whether to proceed with refit operations or to terminate refit operations for a current node based on refit data associated with one or more child nodes of the current node.Type: ApplicationFiled: October 19, 2021Publication date: April 7, 2022Applicant: Intel CorporationInventors: KAI XIAO, MICHAEL APODACA, CARSON BROWNLEE, THOMAS RAOUX, JOSHUA BARCZAK, GABOR LIKTOR
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Publication number: 20220050520Abstract: An embodiment of a graphics apparatus may include a facial expression detector to detect a facial expression of a user, and a parameter adjuster communicatively coupled to the facial expression detector to adjust a graphics parameter based on the detected facial expression of the user. The detected facial expression may include one or more of a squinting, blinking, winking, and facial muscle tension of the user. The graphics parameter may include one or more of a frame resolution, a screen contrast, a screen brightness, and a shading rate. Other embodiments are disclosed and claimed.Type: ApplicationFiled: August 30, 2021Publication date: February 17, 2022Applicant: Intel CorporationInventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Jefferson Amstutz, Carson Brownlee, Vivek Tiwari, Sayan Lahiri, Kai Xiao, Abhishek R. Appu, ElMoustapha Ould-Ahmed-Vall, Deepak S. Vembar, Ankur N. Shah, Balaji Vembu, Josh B. Mastronarde
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Publication number: 20210350609Abstract: An apparatus and method for compressing ray tracing data prior to transmission between nodes. For example, one embodiment of an apparatus comprises: a first node comprising a first ray tracing engine, the first node communicatively coupled to a second node comprising a second ray tracing engine; first compression circuitry coupled to the first ray tracing engine, the first compression circuitry to perform compression on ray tracing data of the first ray tracing engine to produce a first compressed stream of ray tracing data; and interface circuitry to transmit the first compressed stream of ray tracing data from the first node to the second node.Type: ApplicationFiled: April 6, 2021Publication date: November 11, 2021Inventors: Ingo WALD, Gabor LIKTOR, Carsten BENTHIN, Carson BROWNLEE, Johannes GUENTHER, Jefferson D. AMSTUTZ
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Patent number: 11158111Abstract: Apparatus and method for bottom-up BVH refit. For example, one embodiment of an apparatus comprises: a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes; traversal hardware logic to traverse one or more rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node unit comprising circuitry and/or logic to perform refit operations on nodes of the hierarchical acceleration data structure, the refit operations to adjust spatial dimensions of one or more of the nodes; and an early termination evaluator to determine whether to proceed with refit operations or to terminate refit operations for a current node based on refit data associated with one or more child nodes of the current node.Type: GrantFiled: June 29, 2020Date of Patent: October 26, 2021Assignee: Intel CorporationInventors: Kai Xiao, Michael Apodaca, Carson Brownlee, Thomas Raoux, Joshua Barczak, Gabor Liktor
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Publication number: 20210327120Abstract: Real time ray tracing-based adaptive multi frequency shading. For example, one embodiment of an apparatus comprising: rasterization hardware logic to process input data for an image in a deferred rendering pass and to responsively update one or more graphics buffers with first data to be used in a subsequent rendering pass; ray tracing hardware logic to perform ray tracing operations using the first data to generate reflection ray data and to store the reflection ray data in a reflection buffer; and image rendering circuitry to perform texture sampling in a texture buffer based on the reflection ray data in the reflection buffer to render an output image.Type: ApplicationFiled: May 5, 2021Publication date: October 21, 2021Applicant: Intel CorporationInventors: CARSON BROWNLEE, GABOR LIKTOR, JOSHUA BARCZAK, KAI XIAO, MICHAEL APODACA, THOMAS RAOUX
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Patent number: 11106274Abstract: An embodiment of a graphics apparatus may include a facial expression detector to detect a facial expression of a user, and a parameter adjuster communicatively coupled to the facial expression detector to adjust a graphics parameter based on the detected facial expression of the user. The detected facial expression may include one or more of a squinting, blinking, winking, and facial muscle tension of the user. The graphics parameter may include one or more of a frame resolution, a screen contrast, a screen brightness, and a shading rate. Other embodiments are disclosed and claimed.Type: GrantFiled: April 10, 2017Date of Patent: August 31, 2021Assignee: Intel CorporationInventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Jefferson Amstutz, Carson Brownlee, Vivek Tiwari, Sayan Lahiri, Kai Xiao, Abhishek R. Appu, ElMoustapha Ould-Ahmed-Vall, Deepak S. Vembar, Ankur N. Shah, Balaji Vembu, Josh B. Mastronarde
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Publication number: 20210241431Abstract: Apparatus and method for denoising of images generated by a rendering engine such as a ray tracing engine. For example, one embodiment of a system or apparatus comprises: A system comprising: a plurality of nodes to perform ray tracing operations; a dispatcher node to dispatch graphics work to the plurality of nodes, each node to perform ray tracing to render a region of an image frame; at least a first node of the plurality comprising: a ray-tracing renderer to perform ray tracing to render a first region of the image frame; and a denoiser to perform denoising of the first region using a combination of data associated with the first region and data associated with a region outside of the first region, at least some of the data associated with the region outside of the first region to be retrieved from at least one other node.Type: ApplicationFiled: February 9, 2021Publication date: August 5, 2021Inventors: Carson BROWNLEE, Ingo WALD, Attila AFRA, Johannes GUENTHER, Jefferson AMSTUTZ, Carsten BENTHIN
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Patent number: 11069123Abstract: Cloud-based real time rendering.Type: GrantFiled: December 28, 2018Date of Patent: July 20, 2021Assignee: INTEL CORPORATIONInventors: Carson Brownlee, Joshua Barczak, Kai Xiao, Michael Apodaca, Philip Laws, Thomas Raoux, Travis Schluessler
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Patent number: 11004252Abstract: Real time ray tracing-based adaptive multi frequency shading. For example, one embodiment of an apparatus comprising: rasterization hardware logic to process input data for an image in a deferred rendering pass and to responsively update one or more graphics buffers with first data to be used in a subsequent rendering pass; ray tracing hardware logic to perform ray tracing operations using the first data to generate reflection ray data and to store the reflection ray data in a reflection buffer; and image rendering circuitry to perform texture sampling in a texture buffer based on the reflection ray data in the reflection buffer to render an output image.Type: GrantFiled: December 28, 2018Date of Patent: May 11, 2021Assignee: Intel CorporationInventors: Carson Brownlee, Gabor Liktor, Joshua Barczak, Kai Xiao, Michael Apodaca, Thomas Raoux
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Patent number: 10977853Abstract: An apparatus and method for compressing ray tracing data prior to transmission between nodes. For example, one embodiment of an apparatus comprises: a first node comprising a first ray tracing engine, the first node communicatively coupled to a second node comprising a second ray tracing engine; first compression circuitry coupled to the first ray tracing engine, the first compression circuitry to perform compression on ray tracing data of the first ray tracing engine to produce a first compressed stream of ray tracing data; and interface circuitry to transmit the first compressed stream of ray tracing data from the first node to the second node.Type: GrantFiled: February 14, 2020Date of Patent: April 13, 2021Assignee: Intel CorporationInventors: Ingo Wald, Gabor Liktor, Carsten Benthin, Carson Brownlee, Johannes Guenther, Jefferson D. Amstutz