Patents by Inventor Casey Philip Rodriguez

Casey Philip Rodriguez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10342126
    Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: July 2, 2019
    Assignee: HARRIS CORPORATION
    Inventors: Louis Joseph Rendek, Jr., Travis L. Kerby, Casey Philip Rodriguez
  • Publication number: 20170339785
    Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.
    Type: Application
    Filed: August 10, 2017
    Publication date: November 23, 2017
    Inventors: LOUIS JOSEPH RENDEK, JR., TRAVIS L. KERBY, CASEY PHILIP RODRIGUEZ
  • Patent number: 9763324
    Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: September 12, 2017
    Assignee: HARRIS CORPORATION
    Inventors: Louis Joseph Rendek, Jr., Travis L. Kerby, Casey Philip Rodriguez
  • Patent number: 9681543
    Abstract: A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: June 13, 2017
    Assignee: HARRIS CORPORATION
    Inventors: Louis Joseph Rendek, Jr., Travis L. Kerby, Casey Philip Rodriguez, Michael Raymond Weatherspoon
  • Patent number: 9655236
    Abstract: A method for making a multilayer circuit board from circuit board layers, each including a dielectric layer and conductive traces thereon including a first metal. The method includes forming a through-via in a first circuit board layer, plating the through-via with the first metal, and coating a second metal onto the first metal of the first circuit board layer, the plated through-via, and the first metal. The method also includes aligning the first and second circuit board layers together so that the plated through-via of the first circuit board layer is adjacent a feature on the second circuit board layer, and heating and pressing the aligned first and second circuit board layers so as to laminate the dielectric layers together and form an intermetallic compound of the first and second metals bonding adjacent metal portions.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: May 16, 2017
    Assignee: HARRIS CORPORATION
    Inventors: Michael Raymond Weatherspoon, Louis Joseph Rendek, Jr., Lawrence Wayne Shacklette, Casey Philip Rodriguez
  • Publication number: 20160174371
    Abstract: A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.
    Type: Application
    Filed: February 22, 2016
    Publication date: June 16, 2016
    Inventors: LOUIS JOSEPH RENDEK, JR., TRAVIS L. KERBY, CASEY PHILIP RODRIGUEZ, MICHAEL RAYMOND WEATHERSPOON
  • Patent number: 9293438
    Abstract: A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: March 22, 2016
    Assignee: HARRIS CORPORATION
    Inventors: Louis Joseph Rendek, Jr., Casey Philip Rodriguez, Travis L. Kerby, Michael Raymond Weatherspoon
  • Patent number: 9059317
    Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: June 16, 2015
    Assignee: HARRIS CORPORATION
    Inventors: Louis Joseph Rendek, Jr., Michael Raymond Weatherspoon, Casey Philip Rodriguez, David Nicol
  • Publication number: 20150053468
    Abstract: A method for making a multilayer circuit board from circuit board layers, each including a dielectric layer and conductive traces thereon including a first metal. The method includes forming a through-via in a first circuit board layer, plating the through-via with the first metal, and coating a second metal onto the first metal of the first circuit board layer, the plated through-via, and the first metal. The method also includes aligning the first and second circuit board layers together so that the plated through-via of the first circuit board layer is adjacent a feature on the second circuit board layer, and heating and pressing the aligned first and second circuit board layers so as to laminate the dielectric layers together and form an intermetallic compound of the first and second metals bonding adjacent metal portions.
    Type: Application
    Filed: November 4, 2014
    Publication date: February 26, 2015
    Inventors: MICHAEL RAYMOND WEATHERSPOON, LOUIS JOSEPH RENDEK, JR., LAWRENCE WAYNE SHACKLETTE, CASEY PHILIP RODRIGUEZ
  • Publication number: 20150009644
    Abstract: A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 8, 2015
    Inventors: Louis Joseph RENDEK, JR., Casey Philip Rodriguez, Travis L. Kerby, Michael Raymond Weatherspoon
  • Publication number: 20140321089
    Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.
    Type: Application
    Filed: July 7, 2014
    Publication date: October 30, 2014
    Inventors: LOUIS JOSEPH RENDEK, JR., TRAVIS L. KERBY, CASEY PHILIP RODRIGUEZ
  • Patent number: 8844125
    Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: September 30, 2014
    Assignee: Harris Corporation
    Inventors: Louis Joseph Rendek, Jr., Travis L. Kerby, Casey Philip Rodriguez
  • Publication number: 20140138849
    Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.
    Type: Application
    Filed: January 24, 2014
    Publication date: May 22, 2014
    Inventors: LOUIS JOSEPH RENDEK, JR., MICHAEL RAYMOND WEATHERSPOON, CASEY PHILIP RODRIGUEZ, DAVID NICOL
  • Patent number: 8693203
    Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: April 8, 2014
    Assignee: Harris Corporation
    Inventors: Louis Joseph Rendek, Jr., Michael Weatherspoon, Casey Philip Rodriguez, David Nicol
  • Patent number: 8472207
    Abstract: An electronic device includes a substrate with a circuit layer thereon that has a solder pad. There is a liquid crystal polymer (LCP) solder mask on the substrate that has an aperture aligned with the solder pad. There is a fused seam between the substrate and the LCP solder mask. Solder is in the aperture, and a circuit component is electrically coupled to the solder pad via the solder. A first dielectric layer stack having a first plurality of dielectric layers is on the LCP solder mask and has an aperture aligned with the solder pad. There is a first LCP outer sealing layer on the first dielectric layer stack, and a second dielectric layer stack having a second plurality of dielectric layers on the substrate on a side thereof opposite the LCP solder mask. Further, there is a second LCP outer sealing layer on the second dielectric layer stack.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: June 25, 2013
    Assignee: Harris Corporation
    Inventors: Louis Joseph Rendek, Jr., Casey Philip Rodriguez, Steven R. Snyder
  • Publication number: 20120182702
    Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 19, 2012
    Applicant: Harris Corporation
    Inventors: Louis Joseph RENDEK, JR., Travis L. KERBY, Casey Philip RODRIGUEZ
  • Publication number: 20120181073
    Abstract: An electronic device includes a substrate with a circuit layer thereon that has a solder pad. There is a liquid crystal polymer (LCP) solder mask on the substrate that has an aperture aligned with the solder pad. There is a fused seam between the substrate and the LCP solder mask. Solder is in the aperture, and a circuit component is electrically coupled to the solder pad via the solder. A first dielectric layer stack having a first plurality of dielectric layers is on the LCP solder mask and has an aperture aligned with the solder pad. There is a first LCP outer sealing layer on the first dielectric layer stack, and a second dielectric layer stack having a second plurality of dielectric layers on the substrate on a side thereof opposite the LCP solder mask. Further, there is a second LCP outer sealing layer on the second dielectric layer stack.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 19, 2012
    Applicant: Harris Corporation
    Inventors: Louis Joseph RENDEK, JR., Casey Philip Rodriguez, Steven R. Snyder
  • Publication number: 20120182703
    Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 19, 2012
    Applicant: Harris Corporation, Corporation of the State of Delaware
    Inventors: Louis Joseph Rendek, JR., Michael Weatherspoon, Casey Philip Rodriguez, David Nicol