Patents by Inventor Catherine Anne Schevon

Catherine Anne Schevon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Minimal delay conductive lead lines for integrated circuits
    Patent number: 5841333
    Abstract: In accordance with the invention, a conductive lead line extending between a source and a capacitance load has a width w(x) which is a function of the distance x. For many practical applications such as leads for multichip modules, w(x) can be taken as the exponential function of the distance from the load given by the equation below. For many applications w(x) can be adequately approximated by the first three terms of a power series representation: ##EQU1## where W.sub.0 is the width of the lead line at x=0, C.sub.0 is the load capacitance and C.sub.0 is the area capacitance. For VLSI applications w(x) is a friction which can be designated.noteq.E(W.sub.0, C.sub.0, C.sub.p, C.sub.S, x) where C.sub.p is the perimeter capacitance. E(W.sub.0, C.sub.0, C.sub.p, C.sub.S, x) is derived herein.
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: November 24, 1998
    Assignee: Lucent Technologies
    Inventors: John Philip Fishburn, Catherine Anne Schevon