Abstract: Gluing process for micro-structured substrates. The invention is applicable particularly to the fabrication of micro-fluidic components. In order to glue a micro-structured substrate having upper coplanar plane areas and recesses between them, a grid is placed above the substrate, the grid is coated with a glue, using a tool that presses on the grid and locally brings it into contact with the areas, so as to deposit a film of glue droplets on them, and the grid is removed. Furthermore, the upper coplanar plane areas are treated before the film of glue droplets is deposited, this treatment being designed to adapt wettability of these areas to the glue.

Abstract: An organic field-effect transistor includes: source and drain electrodes; a semiconductor layer made of an organic semiconductor material placed at least between said source and drain electrodes; a gate electrode suitable for creating an electric field that increases the density of mobile charge carriers in the semiconductor layer in order to create a conduction channel in this semiconductor layer between the source and drain electrodes when a voltage VG is applied to the gate electrode; and an electrical insulator layer interposed between the gate electrode and the semiconductor layer, characterized in that it further includes a piezoelectric layer placed close to the conduction channel, in the semiconductor layer between the source and drain electrodes or on the opposite side of the gate electrode with respect to the electrical insulator and semiconductor layers, alongside the source and drain electrodes, said piezoelectric layer being electrically isolated from said source and drain electrodes and from the

Abstract: A method for making an electric interconnection between two conducting layers, separated by at least one insulation or semi-conducting layer, which includes forming a stud extending between at least the lower conducting layer and the upper conducting layer, where the nature and/or the shape of the stud impart non-wettability properties relative to the material used for the separating layer.

Abstract: An organic field-effect transistor includes: source and drain electrodes; a semiconductor layer made of an organic semiconductor material placed at least between said source and drain electrodes; a gate electrode suitable for creating an electric field that increases the density of mobile charge carriers in the semiconductor layer in order to create a conduction channel in this semiconductor layer between the source and drain electrodes when a voltage VG is applied to the gate electrode; and an electrical insulator layer interposed between the gate electrode and the semiconductor layer, characterized in that it further includes a piezoelectric layer placed close to the conduction channel, in the semiconductor layer between the source and drain electrodes or on the opposite side of the gate electrode with respect to the electrical insulator and semiconductor layers, alongside the source and drain electrodes, said piezoelectric layer being electrically isolated from said source and drain electrodes and from the

Abstract: This method for making an electric interconnection between two conducting layers separated by at least one insulation or semi-conducting layer, comprises forming a stud extending at least between the lower conducting layer and the upper conducting layer, wherein the nature and/or the shape of said stud impart non-wettability properties relative to the material used for the separating layer.

Abstract: Gluing process for micro-structured substrates. The invention is applicable particularly to the fabrication of micro-fluidic components. In order to glue a micro-structured substrate (2) having upper coplanar plane areas (6) and recesses between them, a grid (10) is placed above the substrate, the grid is coated with a glue (12), using a tool (16) that presses on the grid and locally brings it into contact with the areas, so as to deposit a film (20) of glue droplets on them, and the grid is removed. Furthermore, the upper coplanar plane areas (6) are treated before the film of glue droplets is deposited, this treatment being designed to adapt wettability of these areas to the glue.

Abstract: A process and a device for the passive alignment of supports, particularly plates which carry optical components. According to the invention, in order to align supports (2, 8), holes (6, 7, 11, 12) are formed in these supports, in correspondence with each other, balls (14, 16) are placed on the holes of one of the supports and these are assembled by placing the holes of the other support onto the balls. The sizes of the holes or of the balls are chosen so as to obtain a pre-set non-zero angle (?) between the assembled supports.

Abstract: A process and a device for the passive alignment of supports, particularly plates which carry optical components.

Abstract: The invention relates to a process for producing an electric contact on a HgCdTe substrate having a P conductivity and application to the production of an N/P diode. For producing an N/P diode, an insulating layer deposited on the HgCdTe substrate is etched by ion bombardment through a first mask, so as to produce a first opening in said insulating layer. The mask is removed and the substrate covered by the insulating layer undergoes a heat treatment, so as to at least mitigate the P conductivity drop induced by the ion bombardment in a first portion of the substrate facing the first opening. This is followed by ion implantation in a second portion of the substrate through a second mask in order to produce an N conductivity portion. This second mask is removed and the insulating layer is etched through a third mask by ion bombardment in order to produce a second opening facing the second portion. After removing the third mask, conductive pads are produced in the first and second openings.