Patents by Inventor Cedric THOMAS
Cedric THOMAS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240160795Abstract: A peripheral device, for use with a host, comprises one or more compute elements a security module and at least one encryption unit. The security module is configured to form a trusted execution environment on the peripheral device for processing sensitive data using sensitive code. The sensitive data and sensitive code are provided by a trusted computing entity which is in communication with the host computing device. The at least one encryption unit is configured to encrypt and decrypt data transferred between the trusted execution environment and the trusted computing entity via the host computing device. The security module is configured to compute and send an attestation to the trusted computing entity to attest that the sensitive code is in the trusted execution environment.Type: ApplicationFiled: January 22, 2024Publication date: May 16, 2024Inventors: Stavros VOLOS, David Thomas CHISNALL, Saurabh Mohan KULKARNI, Kapil VASWANI, Manuel COSTA, Samuel Alexander WEBSTER, Cédric Alain Marie FOURNET, Richard OSBORNE, Daniel John Pelham WILKINSON, Graham Bernard CUNNINGHAM
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Patent number: 11921911Abstract: A peripheral device, for use with a host, comprises one or more compute elements a security module and at least one encryption unit. The security module is configured to form a trusted execution environment on the peripheral device for processing sensitive data using sensitive code. The sensitive data and sensitive code are provided by a trusted computing entity which is in communication with the host computing device. The at least one encryption unit is configured to encrypt and decrypt data transferred between the trusted execution environment and the trusted computing entity via the host computing device. The security module is configured to compute and send an attestation to the trusted computing entity to attest that the sensitive code is in the trusted execution environment.Type: GrantFiled: July 13, 2021Date of Patent: March 5, 2024Assignee: Microsoft Technology Licensing, LLC.Inventors: Stavros Volos, David Thomas Chisnall, Saurabh Mohan Kulkarni, Kapil Vaswani, Manuel Costa, Samuel Alexander Webster, Cédric Alain Marie Fournet, Richard Osborne, Daniel John Pelham Wilkinson, Graham Bernard Cunningham
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Publication number: 20230420225Abstract: A substrate processing method in a substrate processing apparatus includes (a) supplying a process gas that contains a gas containing halogen other than fluorine and a gas containing oxygen, to a processing container in which a stage is disposed, the stage being configured to place thereon a workpiece having an etching target film, (b) performing plasma processing on the workpiece by first plasma generated from the process gas under first plasma generation conditions, (c) performing plasma processing on the workpiece by second plasma generated from the process gas under second plasma generation conditions in which a condition of radio-frequency power and a processing time are different from those in the first plasma generation conditions, and other conditions are the same, and (d) repeating (b) and (c).Type: ApplicationFiled: September 14, 2023Publication date: December 28, 2023Applicant: Tokyo Electron LimitedInventors: Tejung HUANG, Shuhei OGAWA, Cedric THOMAS
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Publication number: 20230268161Abstract: A method for processing a substrate includes: supplying a pulsed source RF signal to an antenna disposed above a chamber, the pulsed source RF signal including a plurality of source cycles each having a source operating state and a source non-operating state after the source operating period; and supplying a pulsed bias RF signal to a lower electrode disposed in a substrate support provided in the chamber, the pulsed bias RF signal including a plurality of bias cycles having a same pulse frequency as that of the plurality of source cycles, each bias cycle having a bias operating state during a bias operating period and a bias non-operating state during a bias non-operating period after the bias operating period. A transition timing to the bias operating state in each bias cycle is delayed with respect to a transition timing to the source operating state in a corresponding source cycle.Type: ApplicationFiled: May 1, 2023Publication date: August 24, 2023Applicant: Tokyo Electron LimitedInventors: Cedric THOMAS, Shihchin LEE
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Patent number: 11539295Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.Type: GrantFiled: November 4, 2020Date of Patent: December 27, 2022Assignee: STMicroelectronics (Rousset) SASInventors: Sebastien Ortet, Didier Davino, Cedric Thomas
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Patent number: 11506144Abstract: A thrust reverser cascade for an aircraft nacelle includes a plurality of blades having a first and a second surface, the blades being connected to members connected to attachment flanges for attaching the thrust reverser cascade to the nacelle. At least one of the surfaces of the blades is covered with at least one layer of fibers, each layer including a plurality of fiber pieces which are pre-impregnated with resin. The fiber pieces are superimposed on one another, positioned parallel to the aerodynamic surface of the blade and oriented in different directions.Type: GrantFiled: February 7, 2020Date of Patent: November 22, 2022Assignees: Safran Nacelles, SafranInventors: Géraldine Oliveux, Bertrand Desjoyeaux, Cedric Thomas
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Patent number: 11456661Abstract: The process for starting a power supply circuit which includes a switched-mode power supply is performed using: a first phase during which, if an output voltage of the switched-mode power supply is lower than a first voltage, the switched-mode power supply operates in pulse width modulation mode to increase its output voltage up to said first voltage; and when the output voltage has reached the first voltage, a second phase during which the switched-mode power supply operates in a bypass mode.Type: GrantFiled: July 16, 2020Date of Patent: September 27, 2022Assignee: STMicroelectronics (Rousset) SASInventors: Sebastien Ortet, Cedric Thomas
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Patent number: 11315795Abstract: A substrate processing method performed in a substrate processing apparatus includes providing a substrate which has a first film composed of silicon only and a second film including silicon; and etching the first film by plasma formed from a mixed gas including a halogen-containing gas and a silicon-containing gas but not including an oxygen-containing gas.Type: GrantFiled: April 6, 2021Date of Patent: April 26, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Masaki Inoue, Cedric Thomas
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Publication number: 20210358715Abstract: A plasma processing apparatus includes: a plasma processing chamber; a substrate support disposed in the plasma processing chamber; a source RF generator coupled to the plasma processing chamber, and configured to generate a pulse source RF signal including a plurality of source cycles; and a bias RF generator coupled to the substrate support, and configured to generate a pulse bias RF signal. A transition timing to the bias operating state in each bias cycle is delayed with respect to a transition timing to the source operating state in a corresponding source cycle, the source non-operating period overlaps with the bias non-operating period, and the bias operating period in each bias cycle overlaps with the source operating period in the next source cycle.Type: ApplicationFiled: May 6, 2021Publication date: November 18, 2021Applicant: TOKYO ELECTRON LIMITEDInventors: Cedric THOMAS, Shihchin LEE
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Publication number: 20210313184Abstract: A substrate processing method performed in a substrate processing apparatus includes providing a substrate which has a first film composed of silicon only and a second film including silicon; and etching the first film by plasma formed from a mixed gas including a halogen-containing gas and a silicon-containing gas but not including an oxygen-containing gas.Type: ApplicationFiled: April 6, 2021Publication date: October 7, 2021Inventors: Masaki Inoue, Cedric Thomas
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Patent number: 10937664Abstract: Methods and systems for surface modification are described. In an embodiment, a method of etching includes providing a substrate having a device structure, portions of which are identified for modification. Such a method may also include passivating target surfaces of the device structure by exposing the device structure to a gas-phase composition at a processing pressure equal to or greater than 100 mTorr to form a protection layer on the target surfaces. Other embodiments of a method may include providing a substrate having a device structure, portions of which identified for removal. Such methods may further include passivating target surfaces of the device structure by exposing the device structure to a gas-phase composition, wherein the ratio of the radical content to the ion content exceeds 10-to-1.Type: GrantFiled: September 3, 2019Date of Patent: March 2, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Cedric Thomas, Andrew Nolan, Alok Ranjan
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Publication number: 20210050785Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.Type: ApplicationFiled: November 4, 2020Publication date: February 18, 2021Applicant: STMicroelectronics (Rousset) SASInventors: Sebastien ORTET, Didier DAVINO, Cedric THOMAS
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Publication number: 20210028687Abstract: The process for starting a power supply circuit which includes a switched-mode power supply is performed using: a first phase during which, if an output voltage of the switched-mode power supply is lower than a first voltage, the switched-mode power supply operates in pulse width modulation mode to increase its output voltage up to said first voltage; and when the output voltage has reached the first voltage, a second phase during which the switched-mode power supply operates in a bypass mode.Type: ApplicationFiled: July 16, 2020Publication date: January 28, 2021Applicant: STMicroelectronics (Rousset) SASInventors: Sebastien ORTET, Cedric THOMAS
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Patent number: 10862396Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.Type: GrantFiled: October 11, 2019Date of Patent: December 8, 2020Assignee: STMicroelectronics (Rousset) SASInventors: Sebastien Ortet, Didier Davino, Cedric Thomas
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Publication number: 20200291893Abstract: A thrust reverser cascade for an aircraft nacelle includes a plurality of blades having a first and a second surface, the blades being connected to members connected to attachment flanges for attaching the thrust reverser cascade to the nacelle. At least one of the surfaces of the blades is covered with at least one layer of fibers, each layer including a plurality of fiber pieces which are pre-impregnated with resin. The fiber pieces are superimposed on one another, positioned parallel to the aerodynamic surface of the blade and oriented in different directions.Type: ApplicationFiled: February 7, 2020Publication date: September 17, 2020Applicants: SAFRAN, Safran NacellesInventors: Géraldine OLIVEUX, Bertrand DESJOYEAUX, Cedric THOMAS
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Patent number: 10756628Abstract: An electronic circuit includes a switched-mode power supply powering a first load via a first linear voltage regulator. The first regulator includes a transistor. The substrate and the gate of the transistor are capable of being coupled to a node of application of a power supply voltage. A method of operating the circuit is also disclosed.Type: GrantFiled: May 9, 2019Date of Patent: August 25, 2020Assignee: STMicroelectronics (Rousset) SASInventors: Michel Cuenca, Cedric Thomas
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Publication number: 20200130292Abstract: A material of pre-impregnated woven fibers for a part is in the form of a fibrous mat having at least one layer of several pieces of fibrous fabric pre-impregnated with resin. At least one portion of the fabric has a low-shrinkage contexture. The pieces of fabric are positioned parallel with the plane (X, Y) of the fibrous mat and orientated in different directions in the plane (X, Y).Type: ApplicationFiled: December 30, 2019Publication date: April 30, 2020Applicants: SAFRAN, Safran NacellesInventors: Bertrand DESJOYEAUX, Géraldine OLIVEUX, Cedric THOMAS
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Publication number: 20200119644Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.Type: ApplicationFiled: October 11, 2019Publication date: April 16, 2020Applicant: STMicroelectronics (Rousset) SASInventors: Sebastien ORTET, Didier DAVINO, Cedric THOMAS
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Publication number: 20200075734Abstract: Methods and systems for surface modification are described. In an embodiment, a method of etching includes providing a substrate having a device structure, portions of which are identified for modification. Such a method may also include passivating target surfaces of the device structure by exposing the device structure to a gas-phase composition at a processing pressure equal to or greater than 100 mTorr to form a protection layer on the target surfaces. Other embodiments of a method may include providing a substrate having a device structure, portions of which identified for removal. Such methods may further include passivating target surfaces of the device structure by exposing the device structure to a gas-phase composition, wherein the ratio of the radical content to the ion content exceeds 10-to-1.Type: ApplicationFiled: September 3, 2019Publication date: March 5, 2020Inventors: Cedric Thomas, Andrew Nolan, Alok Ranjan
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Publication number: 20190372460Abstract: An electronic circuit includes a switched-mode power supply powering a first load via a first linear voltage regulator. The first regulator includes a transistor. The substrate and the gate of the transistor are capable of being coupled to a node of application of a power supply voltage. A method of operating the circuit is also disclosed.Type: ApplicationFiled: May 9, 2019Publication date: December 5, 2019Inventors: Michel Cuenca, Cedric Thomas