Abstract: A manufacturing method of a semiconductor device is provided. First, a mould is provided. The mould has a chamber, patterns in the chamber, and protrusions in the chamber. A carrier substrate having at least one die located thereon is disposed in the chamber, and the protrusions surround the die. A thermosetting material is injected into the chamber and is cured. The cured thermosetting material is separated from the mould, so as to form an interposer substrate. A plurality of through holes corresponding to the protrusions and a plurality of grooves corresponding to the patterns are formed on the interposer substrate. A conductive material is filled into the through holes and the grooves to form a plurality of conductive pillars and a first conductive pattern layer on a first surface of the interposer substrate. The first conductive pattern layer is electrically connected with the conductive pillars.

Abstract: A method for fabricating a semiconductor device is provided. The method includes: providing a first wafer having a first active surface and a first rear surface opposite to the first active surface, the first wafer comprising a first circuit formed therein; providing a second wafer having a second active surface and a second rear surface opposite to the second active surface, the second wafer comprising a second circuit formed therein; bonding the first active surface of the first wafer with the second active surface of the second wafer so as to electrically connecting the first circuit and the second circuit; thinning the second wafer from the second rear surface; and forming at least a conductive through via in the second wafer, wherein the conductive through via is electrically connected to the first circuit through the second circuit.

Abstract: The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.

Abstract: A method for manufacturing a through substrate via (TSV) structure, a TSV structure, and a control method of a TSV capacitance are provided. The method for manufacturing the TSV structure includes: providing a substrate having a first surface and a second surface; forming a trench in the first surface of the substrate; filling a low resistance material into the trench; forming an insulating layer on the first surface of the substrate; forming at least one opening in the first surface of the substrate, wherein the opening is located differently the trench; forming an oxide liner layer, a barrier layer and a conductive seed layer on a sidewall and a bottom of the opening and on the insulating layer of the first surface; and filling a conductive material into the opening, wherein the opening is used to form at least one via.

Abstract: A manufacturing method of a semiconductor device is provided. First, a mould is provided. The mould has a chamber, patterns in the chamber, and protrusions in the chamber. A carrier substrate having at least one die located thereon is disposed in the chamber, and the protrusions surround the die. A thermosetting material is injected into the chamber and is cured. The cured thermosetting material is separated from the mould, so as to form an interposer substrate. A plurality of through holes corresponding to the protrusions and a plurality of grooves corresponding to the patterns are formed on the interposer substrate. A conductive material is filled into the through holes and the grooves to form a plurality of conductive pillars and a first conductive pattern layer on a first surface of the interposer substrate. The first conductive pattern layer is electrically connected with the conductive pillars.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The manufacturing method includes following steps. A mold is provided. The mold has a chamber and a plurality of protrusions in the chamber. A thermosetting material is injected into the chamber. The thermosetting material is cured. A parting step is performed to separate the cured thermosetting material from the mold, so as to form an interposer substrate. A plurality of blind holes corresponding to the protrusions is formed on the interposer substrate. A conductive material is filled into the blind holes to form a plurality of conductive pillars. A conductive pattern layer is formed on a surface of the interposer substrate. The conductive pattern layer is electrically connected with the conductive pillars.

Abstract: The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a device layer and a least one conductive post. The substrate includes a first surface, a second surface opposite to the first surface, and at least one through hole penetrating the substrate. The substrate includes a first side wall portion and a second side wall portion at the through hole. The first side wall portion is connected to the first surface and includes a plurality of first scallops. The second side wall portion is connected to the second surface and includes a non-scalloped surface. The device layer is disposed on the second surface, and the second side wall portion of the substrate further extends into the device layer along the non-scalloped surface. The conductive post is disposed in the through hole, wherein the conductive post is electrically connected to the device layer.

Abstract: A method for fabricating a semiconductor device is provided. The method includes: providing a first wafer having a first active surface and a first rear surface opposite to the first active surface, the first wafer comprising a first circuit formed therein; providing a second wafer having a second active surface and a second rear surface opposite to the second active surface, the second wafer comprising a second circuit formed therein; bonding the first active surface of the first wafer with the second active surface of the second wafer so as to electrically connecting the first circuit and the second circuit; thinning the second wafer from the second rear surface; and forming at least a conductive through via in the second wafer, wherein the conductive through via is electrically connected to the first circuit through the second circuit.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The manufacturing method includes following steps. A mould is provided. The mould has a chamber and a plurality of protrusions in the chamber. A thermosetting material is injected into the chamber. The thermosetting material is cured. A parting step is performed to separate the cured thermosetting material from the mould, so as to form an interposer substrate. A plurality of blind holes corresponding to the protrusions is formed on the interposer substrate. A conductive material is filled into the blind holes to form a plurality of conductive pillars. A conductive pattern layer is formed on a surface of the interposer substrate. The conductive pattern layer is electrically connected with the conductive pillars.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a device layer and a least one conductive post. The substrate includes a first surface, a second surface opposite to the first surface, and at least one through hole penetrating the substrate. The substrate includes a first side wall portion and a second side wall portion at the through hole. The first side wall portion is connected to the first surface and includes a plurality of first scallops. The second side wall portion is connected to the second surface and includes a non-scalloped surface. The device layer is disposed on the second surface, and the second side wall portion of the substrate further extends into the device layer along the non-scalloped surface. The conductive post is disposed in the through hole, wherein the conductive post is electrically connected to the device layer.

Abstract: A wafer stacking structure includes a first wafer and a second wafer. The first wafer includes a first through silicon via (TSV) opening and a first TSV filling portion formed in the first TSV opening and including a concave structure. The second wafer includes a second TSV opening and a second TSV filling portion formed in the second TSV opening and including a convex structure. A front surface of the first wafer faces a front surface of the second wafer, and the convex structure of the second TSV filling portion is inserted into the concave structure of the first TSV filling portion.

Abstract: A chip bonding structure at least includes a first substrate, a second substrate opposite to the first substrate, and a copper bonding structure sandwiched in between the first and the second substrates. A Cu—Cu bonding interface is within the copper bonding structure and is characterized with combinations of protrusions and recesses, and the copper crystallization orientation at one side of the Cu—Cu bonding interface is different from that at another side.

Abstract: A through-substrate via structure including a substrate, a conductive layer, and a parasitic capacitance modulation layer is provided. The substrate has at least one opening. The opening is filled with the conductive layer. The parasitic capacitance modulation layer is disposed between the conductive layer and the substrate. The parasitic capacitance modulation layer is placed around the through-substrate via to reduce the depletion capacitance and further reduce the parasitic capacitance of the through-substrate via. Therefore, during transmission of signals with high frequency, the parasitic capacitance around the through-substrate via is rather small and thereby the operation speed of devices is increased.

Abstract: A method for manufacturing a through substrate via (TSV) structure, a TSV structure, and a control method of a TSV capacitance are provided. The method for manufacturing the TSV structure includes: providing a substrate having a first surface and a second surface; forming a trench in the first surface of the substrate; filling a low resistance material into the trench; forming an insulating layer on the first surface of the substrate; forming at least one opening in the first surface of the substrate, wherein the opening is located differently the trench; forming an oxide liner layer, a barrier layer and a conductive seed layer on a sidewall and a bottom of the opening and on the insulating layer of the first surface; and filling a conductive material into the opening, wherein the opening is used to form at least one via.

Abstract: A dual damascene structure having a through silicon via and a manufacturing method thereof are provided. The method includes forming a first, a second, and a third dielectric layers a on a substrate having a conductive structure. A trench is formed in the third dielectric layer. A hard mask layer is formed on the third dielectric layer and a surface of the trench. A first opening having a tapered sidewall is formed in the hard mask layer. A second opening is formed in the second and the third dielectric layers. The substrate exposed by the second opening and the first opening is etched to form a through hole so as to form a dual damascene opening. A liner layer is formed on a surface of the dual damascene opening and the conductive structure is exposed. The dual damascene opening is filled with a conductive material.

Abstract: A through substrate via (TSV) structure is provided, including: a substrate; an opening formed in a portion of the semiconductor substrate; a dielectric layer formed on the sidewall of the opening; a conductive pillar formed inside the opening; and at least a portion of the dielectric layer is removed to form void. Also provided is a method for fabricating a through substrate via (TSV) structure.

Abstract: A manufacturing method of a semiconductor structure includes providing a substrate having an upper surface and a bottom surface. First openings are formed in the substrate. An oxidization process is performed to oxidize the substrate having the first openings therein to form an oxide-containing material layer, and the oxide-containing material layer has second openings therein. A conductive material is filled into the second openings to form conductive plugs. A first device layer is formed a first surface of the oxide-containing material layer, and is partially or fully electrically connected to the conductive plugs. A second device layer is formed on a second surface of the oxide-containing material layer, and is partially or fully electrically connected to the conductive plugs.

Abstract: In a manufacturing method of a semiconductor structure, a substrate having a front surface and a back surface is provided. The front surface has a device layer thereon and conductive plugs electrically connected to the device layer. A thinning process is performed on the back surface of the substrate, such that the back surface of the substrate and surfaces of the conductive plugs have a distance therebetween. Holes are formed in the substrate from the back surface to the conductive plugs, so as to form a porous film. An oxidization process is performed, such that the porous film correspondingly is reacted to form an oxide material layer. A polishing process is performed on the oxide material layer to expose the surfaces of the conductive plugs.

Abstract: A manufacturing method of a semiconductor structure includes providing a substrate having an upper surface and a bottom surface. First openings are formed in the substrate. An oxidization process is performed to oxidize the substrate having the first openings therein to form an oxide-containing material layer, and the oxide-containing material layer has second openings therein. A conductive material is filled into the second openings to form conductive plugs. A first device layer is formed a first surface of the oxide-containing material layer, and is partially or fully electrically connected to the conductive plugs. A second device layer is formed on a second surface of the oxide-containing material layer, and is partially or fully electrically connected to the conductive plugs.