Patents by Inventor Chad Collie

Chad Collie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11561899
    Abstract: Disclosed is a computer implemented method to manage a cache, the method comprising, determining that a primary application opens a first file, wherein opening the first file includes reading the first file into a file cache from a storage. The method also includes, setting a first monitoring variable in the primary application process proc structure, wherein the first monitoring variable is set in response to the primary application opening the first file, and the first monitoring variable records a set of operations completed on the first file by the primary application. The method comprises a first read of the first file being at a beginning of the first file. The method includes identifying that the first file is read according to a pattern that includes reading the first file sequentially and reading the first file entirely and removing the first file from the file cache.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: January 24, 2023
    Assignee: International Business Machines Corporation
    Inventors: Mathew Accapadi, Bret R. Olszewski, Grover Cleveland Davidson, II, Chad Collie
  • Patent number: 11074101
    Abstract: Embodiments include method, systems and computer program products for switching between interrupt context input/output I/O processing versus thread context I/O processing. The method includes receiving, by a processor of a plurality of processors, an interrupt. A device driver for an I/O adapter determines that the dispatch latency for an associated kernel thread is greater than a first predetermined threshold. An adapter switches to an interrupt context mode. The adapter processes an I/O on the processor associated with the received interrupt to completion.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: July 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mathew Accapadi, Chad Collie, Vani D. Ramagiri, Lloyd Phillips, Anil Kalavakolanu, Teresa Hong Pham
  • Publication number: 20200379906
    Abstract: Disclosed is a computer implemented method to manage a cache, the method comprising, determining that a primary application opens a first file, wherein opening the first file includes reading the first file into a file cache from a storage. The method also includes, setting a first monitoring variable in the primary application process proc structure, wherein the first monitoring variable is set in response to the primary application opening the first file, and the first monitoring variable records a set of operations completed on the first file by the primary application. The method comprises a first read of the first file being at a beginning of the first file. The method includes identifying that the first file is read according to a pattern that includes reading the first file sequentially and reading the first file entirely and removing the first file from the file cache.
    Type: Application
    Filed: May 29, 2019
    Publication date: December 3, 2020
    Inventors: Mathew Accapadi, Bret R. Olszewski, Grover Cleveland Davidson, II, Chad Collie
  • Patent number: 10831539
    Abstract: Examples of techniques for hardware thread switching for scheduling policy in a processor are described herein. An aspect includes, based on receiving a request from a first software thread to dispatch to a first hardware thread, determining that the first hardware thread is occupied by a second software thread that has a higher priority than the first software thread. Another aspect includes issuing an interrupt to switch the second software thread from the first hardware thread to a second hardware thread. Another aspect includes, based on switching of the second software thread from the first hardware thread to the second hardware thread, dispatching the first software thread to the first hardware thread.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mathew Accapadi, Chad Collie, Grover C. Davidson, II, Dirk Michel, Bret R. Olszewski
  • Publication number: 20200301735
    Abstract: Examples of techniques for hardware thread switching for scheduling policy in a processor are described herein. An aspect includes, based on receiving a request from a first software thread to dispatch to a first hardware thread, determining that the first hardware thread is occupied by a second software thread that has a higher priority than the first software thread. Another aspect includes issuing an interrupt to switch the second software thread from the first hardware thread to a second hardware thread. Another aspect includes, based on switching of the second software thread from the first hardware thread to the second hardware thread, dispatching the first software thread to the first hardware thread.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 24, 2020
    Inventors: Mathew Accapadi, Chad Collie, Grover C. Davidson, II, Dirk Michel, Bret R. Olszewski
  • Publication number: 20200125395
    Abstract: Embodiments include method, systems and computer program products for switching between interrupt context input/output I/O processing versus thread context I/O processing. The method includes receiving, by a processor of a plurality of processors, an interrupt. A device driver for an I/O adapter determines that the dispatch latency for an associated kernel thread is greater than a first predetermined threshold. An adapter switches to an interrupt context mode. The adapter processes an I/O on the processor associated with the received interrupt to completion.
    Type: Application
    Filed: October 23, 2018
    Publication date: April 23, 2020
    Inventors: Mathew Accapadi, Chad Collie, Vani D. Ramagiri, Lloyd Phillips, Anil Kalavakolanu, Teresa Hong Pham