Patents by Inventor Chae O Chung

Chae O Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing semiconductor device utilizing low dielectric layer filling gaps between metal lines
    Patent number: 7838414
    Abstract: A semiconductor device is manufactured by forming a low dielectric constant layer on a semiconductor substrate which is formed with metal lines; implementing primary ultraviolet treatment of the low dielectric constant layer; forming a capping layer on the low dielectric constant layer having undergone the primary ultraviolet treatment; and implementing secondary ultraviolet treatment of the low dielectric constant layer including the capping layer.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: November 23, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chan Bae Kim, Jong Min Lee, Chae O Chung, Hyeon Ju An, Hyo Seok Lee, Sung Kyu Min
  • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE UTILIZING LOW DIELECTRIC LAYER FILLING GAPS BETWEEN METAL LINES
    Publication number: 20080318437
    Abstract: A semiconductor device is manufactured by forming a low dielectric constant layer on a semiconductor substrate which is formed with metal lines; implementing primary ultraviolet treatment of the low dielectric constant layer; forming a capping layer on the low dielectric constant layer having undergone the primary ultraviolet treatment; and implementing secondary ultraviolet treatment of the low dielectric constant layer including the capping layer.
    Type: Application
    Filed: August 6, 2007
    Publication date: December 25, 2008
    Inventors: Chan Bae Kim, Jong Min Lee, Chae O Chung, Hyeon Ju An, Hyo Seok Lee, Sung Kyu Min