Patents by Inventor Chaitanya Mudivarthi

Chaitanya Mudivarthi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240019318
    Abstract: An electronic device may include one or more ultrasonic temperature sensors. The ultrasonic temperature sensors may be formed in openings or cavities in a housing of the electronic device. The ultrasonic temperature sensors may include ultrasonic transmitters that transmit signals at different ultrasonic frequencies and ultrasonic receivers that receive the transmitted signals. Phase differences between the received ultrasonic signals may be used to determine the speed of sound of ambient air and therefore calculate the temperature of the ambient air. The ultrasonic transmitters and receivers may include piezoelectric micromachined ultrasound transducers (PMUTs). Each transmitter and receiver may be a dedicated transmitter or receiver, or may transmit and receive ultrasonic signals. Each receiver may include an array of PMUTs that receive ultrasonic signals of different frequencies. The PMUTS may be formed on complementary metal-oxide semiconductors (CMOS).
    Type: Application
    Filed: April 20, 2023
    Publication date: January 18, 2024
    Inventors: Krishna Prasad Vummidi Murali, Patrick R. Gill, Chaitanya Mudivarthi, Roberto M Ribeiro, Mohammad Waleed Shinwari, Flavius Pop, Michael A Lehr
  • Patent number: 11860244
    Abstract: Disclosed is a magnetometer architecture that couples one or more coils to a magnetic yoke to allow the reset of the magnetic yoke and one or more magnetic field sensors simultaneously after, for example, exposure to a large stray magnetic field. Also, disclosed is a magnetometer architecture that integrates separate magnetic pole pieces offset from the yoke that are each wound by a reset coil to allow reset of the one or more magnetic field sensors.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: January 2, 2024
    Assignee: Apple Inc.
    Inventors: Savas Gider, Chaitanya Mudivarthi, Joyce M. Mullenix
  • Publication number: 20230403943
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 14, 2023
    Applicant: Everspin Technologies, Inc.
    Inventors: Sarin A. DESHPANDE, Kerry Joseph NAGEL, Chaitanya MUDIVARTHI, Sanjeev AGGARWAL
  • Patent number: 11778919
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: October 3, 2023
    Assignee: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Sarin A. Deshpande, Kerry Joseph Nagel, Chaitanya Mudivarthi, Sanjeev Aggarwal
  • Publication number: 20230095729
    Abstract: Circuitry in the electronic device may use a plurality of magnetic sensors to detect an alternating current signal transmitted by the wireless charger and/or to detect a magnetic field generated by one or more magnets in the wireless charger. The circuitry may determine a position of the wireless charger relative to a wireless power transfer coil in the electronic device and provide feedback to guide users in attaching the wireless charger to the correct position on the electronic device, including such as visual indications on a device display.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 30, 2023
    Inventors: William R. Allan, Guangwu Duan, Jian Guo, Chaitanya Mudivarthi, Long T. Pham
  • Publication number: 20230089110
    Abstract: Disclosed is a magnetometer architecture that couples one or more coils to a magnetic yoke to allow the reset of the magnetic yoke and one or more magnetic field sensors simultaneously after, for example, exposure to a large stray magnetic field. Also, disclosed is a magnetometer architecture that integrates separate magnetic pole pieces offset from the yoke that are each wound by a reset coil to allow reset of the one or more magnetic field sensors.
    Type: Application
    Filed: November 22, 2022
    Publication date: March 23, 2023
    Inventors: Savas Gider, Chaitanya Mudivarthi, Joyce M. Mullenix
  • Patent number: 11513169
    Abstract: Disclosed is a magnetometer architecture that couples one or more coils to a magnetic yoke to allow the reset of the magnetic yoke and one or more magnetic field sensors simultaneously after, for example, exposure to a large stray magnetic field. Also, disclosed is a magnetometer architecture that integrates separate magnetic pole pieces offset from the yoke that are each wound by a reset coil to allow reset of the one or more magnetic field sensors.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: November 29, 2022
    Assignee: Apple Inc.
    Inventors: Savas Gider, Chaitanya Mudivarthi, Joyce M. Mullenix
  • Publication number: 20220045269
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Application
    Filed: October 26, 2021
    Publication date: February 10, 2022
    Applicant: Everspin Technologies, Inc.
    Inventors: Sarin A. DESHPANDE, Kerry Joseph NAGEL, Chaitanya MUDIVARTHI, Sanjeev AGGARWAL
  • Patent number: 11189785
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer. (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: November 30, 2021
    Assignee: Everspin Technologies, Inc.
    Inventors: Sarin A. Deshpande, Kerry Joseph Nagel, Chaitanya Mudivarthi, Sanjeev Aggarwal
  • Patent number: 10816612
    Abstract: Disclosed is a magnetometer architecture that uses a separate shield to minimize cross-axis sensitivity with low impact on main axis sensitivity. In an embodiment, a magnetometer with cross-axis shielding comprises: a ring shield; a magnetic yoke disposed within the ring shield; and one or more magnetic field sensors disposed between the ring shield and the magnetic yoke, the magnetic field sensors positioned relative to the ring shield and the magnetic yoke such that flux induced by a magnetic field is absorbed in a cross-axis direction of the magnetometer.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: October 27, 2020
    Assignee: Apple Inc.
    Inventors: Savas Gider, Jian Guo, Chaitanya Mudivarthi
  • Publication number: 20200319265
    Abstract: Disclosed is a magnetometer architecture that couples one or more coils to a magnetic yoke to allow the reset of the magnetic yoke and one or more magnetic field sensors simultaneously after, for example, exposure to a large stray magnetic field. Also, disclosed is a magnetometer architecture that integrates separate magnetic pole pieces offset from the yoke that are each wound by a reset coil to allow reset of the one or more magnetic field sensors.
    Type: Application
    Filed: April 5, 2019
    Publication date: October 8, 2020
    Inventors: Savas Gider, Chaitanya Mudivarthi, Joyce M. Mullenix
  • Publication number: 20200243761
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer. (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Applicant: Everspin Technologies, Inc.
    Inventors: Sarin A. DESHPANDE, Kerry Joseph NAGEL, Chaitanya MUDIVARTHI, Sanjeev AGGARWAL
  • Patent number: 10658576
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: May 19, 2020
    Assignee: Everspin Technologies, Inc.
    Inventors: Sarin A. Deshpande, Kerry Joseph Nagel, Chaitanya Mudivarthi, Sanjeev Aggarwal
  • Publication number: 20200020852
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Application
    Filed: September 24, 2019
    Publication date: January 16, 2020
    Applicant: Everspin Technologies, Inc.
    Inventors: Sarin A. DESHPANDE, Kerry Joseph NAGEL, Chaitanya MUDIVARTHI, Sanjeev AGGARWAL
  • Publication number: 20190369169
    Abstract: Disclosed is a magnetometer architecture that uses a separate shield to minimize cross-axis sensitivity with low impact on main axis sensitivity. In an embodiment, a magnetometer with cross-axis shielding comprises: a ring shield; a magnetic yoke disposed within the ring shield; and one or more magnetic field sensors disposed between the ring shield and the magnetic yoke, the magnetic field sensors positioned relative to the ring shield and the magnetic yoke such that flux induced by a magnetic field is absorbed in a cross-axis direction of the magnetometer.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 5, 2019
    Applicant: Apple Inc.
    Inventors: Savas Gider, Jian Guo, Chaitanya Mudivarthi
  • Patent number: 10483460
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching the first encapsulation layer which is disposed over the exposed surface of the dielectric layer. The method further includes (a) depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer and (b) depositing a third encapsulation layer: (i) on the second encapsulation layer which is on the first encapsulation layer and the exposed surface of the dielectric layer. The method also includes etching the remaining layers of the stack/structure (via one or more etch processes).
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: November 19, 2019
    Assignee: Everspin Technologies, Inc.
    Inventors: Kerry Joseph Nagel, Wenchin Lin, Sarin A. Deshpande, Jijun Sun, Sanjeev Aggarwal, Chaitanya Mudivarthi
  • Patent number: 10461250
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: October 29, 2019
    Assignee: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Sarin A. Deshpande, Kerry Joseph Nagel, Chaitanya Mudivarthi, Sanjeev Aggarwal
  • Publication number: 20180375018
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Application
    Filed: July 31, 2018
    Publication date: December 27, 2018
    Applicant: Everspin Technologies, Inc.
    Inventors: Sarin A. DESHPANDE, Kerry Joseph NAGEL, Chaitanya MUDIVARTHI, Sanjeev AGGARWAL
  • Patent number: 10079339
    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: September 18, 2018
    Assignee: Everspin Technologies, Inc.
    Inventors: Sarin A. Deshpande, Kerry Joseph Nagel, Chaitanya Mudivarthi, Sanjeev Aggarwal
  • Patent number: 10056544
    Abstract: Methods for manufacturing magnetoresistive devices are presented in which isolation of magnetic layers in the magnetoresistive stack is achieved by oxidizing exposed sidewalls of the magnetic layers and then depositing additional encapsulating material prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: August 21, 2018
    Assignee: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Chaitanya Mudivarthi, Sarin A. Deshpande, Sanjeev Aggarwal