Patents by Inventor Chan-bong Jun

Chan-bong Jun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8514027
    Abstract: A method of multi-stage substrate etching and a terahertz oscillator manufactured by using the method are provided. The method comprises the steps of forming a first mask pattern on any one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, bonding, to the first substrate, a second substrate having the same thickness as a depth to be etched, forming a second mask pattern on the second substrate bonded, forming a hole by etching the second substrate using the second mask pattern as an etching mask, and removing an oxide layer having the etching selectivity between the first substrate and the second substrate.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: August 20, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan Wook Baik, Jong Seok Kim, Seong Chan Jun, Sun Il Kim, Jong Min Kim, Chan Bong Jun, Sang Hun Lee
  • Publication number: 20120133450
    Abstract: A method of multi-stage substrate etching and a terahertz oscillator manufactured by using the method are provided. The method comprises the steps of forming a first mask pattern on any one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, bonding, to the first substrate, a second substrate having the same thickness as a depth to be etched, forming a second mask pattern on the second substrate bonded, forming a hole by etching the second substrate using the second mask pattern as an etching mask, and removing an oxide layer having the etching selectivity between the first substrate and the second substrate.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 31, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chan Wook BAIK, Jong Seok KIM, Seong Chan JUN, Sun Il KIM, Jong Min KIM, Chan Bong JUN, Sang Hun LEE
  • Patent number: 8092702
    Abstract: A method of multi-stage substrate etching and a terahertz oscillator manufactured by using the method are provided. The method comprises the steps of forming a first mask pattern on any one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, bonding, to the first substrate, a second substrate having the same thickness as a depth to be etched, forming a second mask pattern on the second substrate bonded, forming a hole by etching the second substrate using the second mask pattern as an etching mask, and removing an oxide layer having the etching selectivity between the first substrate and the second substrate, whereby the etched bottom is made uniformly even in a deep step, the edge curvature is minimized, and a T-shape is prevented from being formed on the etched wall face to thereby improve the etching quality.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: January 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan Wook Baik, Jong Seok Kim, Seong Chan Jun, Sun Il Kim, Jong Min Kim, Chan Bong Jun, Sang Hun Lee
  • Publication number: 20110156836
    Abstract: There is provided a duplexer device and a method of manufacturing the same. The duplexer device includes a substrate including a duplex circuit; first and second acoustic wave filter chips mounted on the substrate in a flip chip bonding manner and constituting an Rx (receiver) filter and a Tx (transmitter) filter, respectively; and a molding portion covering the first and second acoustic wave filter chips. The first and second acoustic wave filter chips are arranged by flip chip bonding, so there is no need for a separate protective structure so as to protect device functional portions of the chips. Accordingly, a compact product is realized and a manufacturing process is simplified.
    Type: Application
    Filed: July 26, 2010
    Publication date: June 30, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yeong Gyu LEE, Yong Deuk YE, Je Hong KYOUNG, Chan Bong JUN
  • Publication number: 20090029118
    Abstract: A method of multi-stage substrate etching and a terahertz oscillator manufactured by using the method are provided. The method comprises the steps of forming a first mask pattern on any one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, bonding, to the first substrate, a second substrate having the same thickness as a depth to be etched, forming a second mask pattern on the second substrate bonded, forming a hole by etching the second substrate using the second mask pattern as an etching mask, and removing an oxide layer having the etching selectivity between the first substrate and the second substrate, whereby the etched bottom is made uniformly even in a deep step, the edge curvature is minimized, and a T-shape is prevented from being formed on the etched wall face to thereby improve the etching quality.
    Type: Application
    Filed: February 4, 2008
    Publication date: January 29, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chan Wook BAIK, Jong Seok KIM, Seong Chan JUN, Sun Il KIM, Jong Min KIM, Chan Bong JUN, Sang Hun LEE
  • Publication number: 20080144173
    Abstract: A multi-display apparatus includes a plurality of panels connected to each other and displaying an image, wherein the plurality of panels comprise a top emission type display apparatus and a bottom emission type display apparatus, and the top emission type display apparatus and the bottom emission type display apparatus are connected to each other such that the top emission type display apparatus and the bottom emission type display apparatus emit light in a same direction, and the top emission type display apparatus and the bottom emission type display apparatus are arranged with a step difference therebetween such that pixel boundaries of adjacent side boundary surfaces of the top emission type display apparatus and of the bottom emission type display apparatus overlap each other.
    Type: Application
    Filed: August 2, 2007
    Publication date: June 19, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-deok Bae, Jun-seong Kim, Euk-che Hwang, Chan-bong Jun
  • Publication number: 20080111462
    Abstract: An organic electro-luminescent display (“OELD”) and a method of manufacturing the OELD include: a substrate; a plurality of anodes substantially parallel with one another in a first direction and disposed on the substrate; a plurality of cathodes disposed substantially parallel with one another in a second direction orthogonal to the first direction; organic electro-luminescent parts disposed at intersections between the anodes and the cathodes; a plurality of cathode separators each disposed between the cathodes; and gaps separating lower edges of the cathode separators facing the cathodes from the substrate.
    Type: Application
    Filed: July 19, 2007
    Publication date: May 15, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-deok BAE, Chan-bong JUN, Chang-seung LEE, Hong-shik SHIM
  • Publication number: 20080106189
    Abstract: An organic electro-luminescent display (“OELD”) and a method of manufacturing the OELD include: a substrate; a plurality of anodes substantially parallel with one another in a first direction and disposed on the substrate; a plurality of cathodes disposed substantially parallel with one another in a second direction orthogonal to the plurality of anodes; organic electro-luminescent parts disposed at intersections between the anodes and the cathodes; and cathode separators disposed between the cathodes. Upper portions of the cathode separators are wider than lower portions of the cathode separators; and protrusions protrude from sides of the upper portions of the cathode separators.
    Type: Application
    Filed: July 19, 2007
    Publication date: May 8, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ki-deok Bae, Chang-seung Lee, Chan-bong Jun
  • Publication number: 20080094455
    Abstract: An inkjet printhead heater including a plurality of unit heater layers each including a first nitride layer and a second nitride layer stacked on the first nitride layer, and an inkjet printhead including the heater, and a method of manufacturing an inkjet printhead heater including stacking a plurality of unit heater layers, each including a substrate having a first nitride layer and a second nitride layer stacked on the first nitride layer.
    Type: Application
    Filed: May 1, 2007
    Publication date: April 24, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun LEE, Sang-jun Choi, Hyung-jin Bae, Chan-bong Jun
  • Publication number: 20080079781
    Abstract: An inkjet printhead and a method of manufacturing the same. The inkjet printhead may include a substrate through which an ink feed hole to supply ink is formed, a chamber layer stacked above the substrate and including a plurality of ink chambers filled with ink supplied from the ink feed hole, and a nozzle layer stacked on the chamber layer, wherein a plurality of nozzles through which ink is ejected and a plurality of via holes are formed in the nozzle layer.
    Type: Application
    Filed: May 1, 2007
    Publication date: April 3, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong-sik Shim, Yong-seop Yoon, Moon-chul Lee, Chan-bong Jun, Hyung Choi, Yong-won Jeong
  • Patent number: 7172916
    Abstract: A method and apparatus for vacuum-mounting at least one micro electro mechanical system (MEMS) on a substrate includes a gas injecting section for injecting an inert gas into a vacuum chamber; a substrate aligning section for aligning a semiconductor substrate and a cover, the cover having a cavity formed therein and a getter attached to an interior surface of the cavity; a bonding section for bonding the semiconductor substrate and the cover together; and a controlling section for controlling the substrate aligning section to align the semiconductor and the cover, for controlling the gas injecting section to inject the inert gas into the vacuum chamber, and for controlling the bonding section to bond the semiconductor substrate and the cover together after the inert gas is injected.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: February 6, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-dong Jung, Chan-Bong Jun, Hyung Choi, Seok-jin Kang, Seog-woo Hong, Seok-whan Chung, Moon-chul Lee, Eun-sung Lee
  • Patent number: 7148141
    Abstract: Disclosed is a method for forming a plurality of metal structures having different heights on a semiconductor substrate. The disclosed method for manufacturing a metal structure having different heights includes: forming a plurality of seed layers, to have heights corresponding to the metal structure to be formed, on a semiconductor substrate so that those layers can be electrically separated, performing a plating process using a plating mold, and applying different currents to the respective seed layers so that the plating thickness can be adjusted for each of the seed layers. Accordingly, a plurality of metal structures having different heights can be obtained by a plating mold forming process and a plating process that are performed just once, respectively.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: December 12, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-sik Shim, Chan-bong Jun, Hyung Choi, Hoon Song
  • Patent number: 7119638
    Abstract: A film bulk acoustic resonator (FBAR) includes a resistance layer deposited on the upper surface of a semiconductor substrate and having a recess therein, a membrane layer on the upper surfaces of the resistance layer and the recess, thereby forming an air gap between the membrane layer and the semiconductor substrate, and a resonator having a lower electrode, a piezoelectric layer, and an upper electrode deposited on the membrane layer. The resistance layer may include first and second resistance layers, the first resistance layer having the recess therein and the second resistance layer being deposited on the upper surfaces of the recess. Thus, the air gap is formed without etching the semiconductor substrate, enhancing the resonant characteristics of the FBAR. Active and/or passive devices can be formed underneath the air gap to be integrated with the FBAR.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: October 10, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-bong Jun, O-gweon Seo
  • Patent number: 7084073
    Abstract: A method of forming a via hole through a glass wafer includes depositing a material layer on an outer surface of the glass wafer, the material layer having a selection ratio higher than that of the glass wafer, forming a via-patterned portion on one side of the material layer, performing a first etching in which the via-patterned portion is etched to form a preliminary via hole, eliminating any remaining patterning material used in the formation of the via-patterned portion, performing a second etching in which the preliminary via hole is etched to form a via hole having a smooth surface and extending through the glass wafer, and eliminating the material layer. The method according to the present invention is able to form a via hole through a glass wafer without allowing formation of an undercut or minute cracks, thereby increasing the yield and reliability of MEMS elements.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: August 1, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Hyung Choi, Kyu-dong Jung, Mi Jang, Seog-woo Hong, Seok-whan Chung, Chan-bong Jun, Seok-jin Kang
  • Publication number: 20050136636
    Abstract: Disclosed is a method for forming a plurality of metal structures having different heights on a semiconductor substrate. The disclosed method for manufacturing a metal structure having different heights includes: forming a plurality of seed layers, to have heights corresponding to the metal structure to be formed, on a semiconductor substrate so that those layers can be electrically separated, performing a plating process using a plating mold, and applying different currents to the respective seed layers so that the plating thickness can be adjusted for each of the seed layers. Accordingly, a plurality of metal structures having different heights can be obtained by a plating mold forming process and a plating process that are performed just once, respectively.
    Type: Application
    Filed: December 16, 2004
    Publication date: June 23, 2005
    Inventors: Dong-sik Shim, Chan-bong Jun, Hyung Choi, Hoon Song
  • Patent number: 6835594
    Abstract: A metal wiring method for an undercut in a MEMS packaging process includes disposing a MEMS element on a silicon substrate, welding a glass wafer to an upper portion of the silicon substrate having the MEMS element disposed thereon, the glass wafer having a hole formed therein for connecting a metal wiring, depositing a thin metal film for the metal wiring in the hole, and ion-mealing the deposited thin metal film. By the ion-mealing, the method is capable of connecting a metal wiring to a via hole having an undercut.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: December 28, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ci-moo Shong, Seok-jin Kang, Seok-whan Chung, Moon-chul Lee, Kyu-dong Jung, Jong-seok Kim, Chan-bong Jun, Seog-woo Hong, Jung-ho Kang
  • Publication number: 20040207490
    Abstract: A film bulk acoustic resonator (FBAR) includes a resistance layer deposited on the upper surface of a semiconductor substrate and having a recess therein, a membrane layer on the upper surfaces of the resistance layer and the recess, thereby forming an air gap between the membrane layer and the semiconductor substrate, and a resonator having a lower electrode, a piezoelectric layer, and an upper electrode deposited on the membrane layer. The resistance layer may include first and second resistance layers, the first resistance layer having the recess therein and the second resistance layer being deposited on the upper surfaces of the recess. Thus, the air gap is formed without etching the semiconductor substrate, enhancing the resonant characteristics of the FBAR. Active and/or passive devices can be formed underneath the air gap to be integrated with the FBAR.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 21, 2004
    Inventors: Chan-bong Jun, O-gweon Seo
  • Publication number: 20040203186
    Abstract: A metal wiring method for an undercut in a MEMS packaging process includes disposing a MEMS element on a silicon substrate, welding a glass wafer to an upper portion of the silicon substrate having the MEMS element disposed thereon, the glass wafer having a hole formed therein for connecting a metal wiring, depositing a thin metal film for the metal wiring in the hole, and ion-mealing the deposited thin metal film. By the ion-mealing, the method is capable of connecting a metal wiring to a via hole having an undercut.
    Type: Application
    Filed: October 17, 2003
    Publication date: October 14, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ci-moo Shong, Seok-jin Kang, Seok-whan Chung, Moon-chul Lee, Kyu-dong Jung, Jong-seok Kim, Chan-bong Jun, Seog-woo Hong, Jung-ho Kang
  • Publication number: 20040115856
    Abstract: A method and apparatus for vacuum-mounting at least one micro electro mechanical system (MEMS) on a substrate includes a gas injecting section for injecting an inert gas into a vacuum chamber; a substrate aligning section for aligning a semiconductor substrate and a cover, the cover having a cavity formed therein and a getter attached to an interior surface of the cavity; a bonding section for bonding the semiconductor substrate and the cover together; and a controlling section for controlling the substrate aligning section to align the semiconductor and the cover, for controlling the gas injecting section to inject the inert gas into the vacuum chamber, and for controlling the bonding section to bond the semiconductor substrate and the cover together after the inert gas is injected.
    Type: Application
    Filed: November 6, 2003
    Publication date: June 17, 2004
    Inventors: Kyu-Dong Jung, Chan-Bong Jun, Hyung Choi, Seok-Jin Kang, Seog-Woo Hong, Seok-Whan Chung, Moon-Chul Lee, Eun-Sung Lee
  • Publication number: 20040092105
    Abstract: A method of forming a via hole through a glass wafer includes depositing a material layer on an outer surface of the glass wafer, the material layer having a selection ratio higher than that of the glass wafer, forming a via-patterned portion on one side of the material layer, performing a first etching in which the via-patterned portion is etched to form a preliminary via hole, eliminating any remaining patterning material used in the formation of the via-patterned portion, performing a second etching in which the preliminary via hole is etched to form a via hole having a smooth surface and extending through the glass wafer, and eliminating the material layer. The method according to the present invention is able to form a via hole through a glass wafer without allowing formation of an undercut or minute cracks, thereby increasing the yield and reliability of MEMS elements.
    Type: Application
    Filed: October 9, 2003
    Publication date: May 13, 2004
    Inventors: Moon-chul Lee, Hyung choi, Kyu-dong Jung, Mi Jang, Seog-woo Hong, Seok-whan Chung, Chan-bong Jun, Seok-jin Kang