Patents by Inventor Chandler T. McDowell

Chandler T. McDowell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210206430
    Abstract: An approach for automated differentially steering either three-wheeled or four-wheeled vehicles in response to input data collected from sensors associated with characteristics of vehicular movement is suitable for vehicles that travel at speeds about or exceeding 15 miles/hour. An automated differential vehicular steering system comprising such an approach includes a drive control computer including a closed loop vehicular motional controller, a plurality of sensing systems comprised of one or more wheel sensors, one or more inertial sensors measuring vehicular movement, and software for modeling a response to outputs from the plurality of sensing systems. The design of the differential vehicular steering system enables improvements in autonomous or unmanned driving, as no user input is needed for steering.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 8, 2021
    Applicant: EVA, LLC
    Inventors: Donald Jack North, Chandler T. McDowell
  • Patent number: 7667513
    Abstract: A circuit and method of correcting the duty cycle of digital signals is disclosed. The duty cycle of an input digital signal is measured and compared to a desired duty cycle. The leading edge of the input digital signal is passed to an output. The circuit and method adjust the falling edges at the output to achieve the desired duty cycle. The falling edges occur in response to rising edges of a delayed version of the input digital signal.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: February 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gary D. Carpenter, Alan J. Drake, Fadi H. Gebara, Chandler T. McDowell, Hung C. Ngo
  • Patent number: 7622942
    Abstract: A test structure for statistical characterization of local device mismatches contains densely populated SRAM devices arranged in a row/column addressable array that enables resource sharing of many devices. The test structure includes a built-in sensing mechanism to calibrate or null out sources of error, and current steering to avoid negative effects of current leakage along spurious paths. The gate and drain lines of each column are driven from both the top and bottom to minimizes parasitic effects. The system can handle a large number of devices while still providing high spatial resolution of current measurements.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: November 24, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kanak B. Agarwal, Ying Liu, Chandler T. McDowell, Sani R. Nassif, James F. Plusquellic, Jayakumaran Sivagnaname
  • Publication number: 20080258752
    Abstract: A test structure for statistical characterization of local device mismatches contains densely populated SRAM devices arranged in a row/column addressable array that enables resource sharing of many devices. The test structure includes a built-in sensing mechanism to calibrate or null out sources of error, and current steering to avoid negative effects of current leakage along spurious paths. The gate and drain lines of each column are driven from both the top and bottom to minimizes parasitic effects. The system can handle a large number of devices while still providing high spatial resolution of current measurements.
    Type: Application
    Filed: June 26, 2008
    Publication date: October 23, 2008
    Inventors: Kanak B. Agarwal, Ying Liu, Chandler T. McDowell, Sani R. Nassif, James F. Plusquellic, Jayakumaran Sivagnaname
  • Patent number: 7408372
    Abstract: A test structure for statistical characterization of local device mismatches contains densely populated SRAM devices arranged in a row/column addressable array that enables resource sharing of many devices. The test structure includes a built-in sensing mechanism to calibrate or null out sources of error, and current steering to avoid negative effects of current leakage along spurious paths. The gate and drain lines of each column are driven from both the top and bottom to minimizes parasitic effects. The system can handle a large number of devices while still providing high spatial resolution of current measurements.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: August 5, 2008
    Assignee: International Business Machines Corporation
    Inventors: Kanak B. Agarwal, Ying Liu, Chandler T. McDowell, Sani R. Nassif, James F. Plusquellic, Jayakumaran Sivagnaname
  • Publication number: 20070296442
    Abstract: A test structure for statistical characterization of local device mismatches contains densely populated SRAM devices arranged in a row/column addressable array that enables resource sharing of many devices. The test structure includes a built-in sensing mechanism to calibrate or null out sources of error, and current steering to avoid negative effects of current leakage along spurious paths. The gate and drain lines of each column are driven from both the top and bottom to minimizes parasitic effects. The system can handle a large number of devices while still providing high spatial resolution of current measurements.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 27, 2007
    Inventors: Kanak B. Agarwal, Ying Liu, Chandler T. McDowell, Sani R. Nassif, James F. Plusquellic, Jayakumaran Sivagnaname
  • Patent number: 7284029
    Abstract: A 4-to-2 carry save adder using limited switching dynamic logic (LSDL) to reduce power consumption while reducing the delay of outputting the sum and carry bits. The 4-to-2 carry save adder may include a first LSDL circuit configured to output a sum bit. The carry save adder may further include a second LSDL circuit configured to output a carry bit. Both the first and second LSDL circuits use a carry generated in the current stage that was previously generated in the previous stage (next lower order bit position). Since the carry is generated in the current stage and not in the previous stage, the delay in outputting the sum and carry bits is reduced and hence the performance of carry save adders is improved. Further, since LSDL circuits were used in the carry save adder, power consumption was reduced while using a small amount of area.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: October 16, 2007
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Ramyanshu Datta, Chandler T. McDowell, Robert K. Montoye, Hung C. Ngo
  • Patent number: 7216141
    Abstract: A 4-to-2 carry save adder with a reduction in the delay of outputting the sum and carry bits. The 4-to-2 carry save adder may include a lower order full order coupled to a higher order full adder. The carry save adder may further include a logic unit coupled to the higher order full adder where the logic unit is configured to generate a carry bit to be inputted to the higher order full adder that normally would be generated from the carry save adder located in the previous stage. By generating this carry bit (carry-in bit) in the current stage and not in the previous stage, the delay of the carry-in bit inputted to the higher order full adder is reduced thereby reducing the delay of outputting the sum and carry bits by the higher order full adder.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: May 8, 2007
    Assignee: International Business Machines Corporaiton
    Inventors: Wendy A. Belluomini, Ramyanshu Datta, Jente Benedict Kuang, Chandler T. McDowell, Robert K. Montoye, Hung C. Ngo
  • Patent number: 6769774
    Abstract: A method and systems for projecting an image onto a screen in high ambient light. The image is composed as pixels comprising selected intensities of preselected bands of visible light. The pixels are created by modulating three frequencies of light corresponding to hues in the red, green, and blue spectrum. The modulated light selectively generates pixels of a frame of the image. A diffusive projection screen has a triple bandpass light filter surface that selectively transmits preselected bands of light frequencies around the red, green, and blue spectrums of the modulated light source. The triple bandpass light filter is used with projection screens in front and rear projection systems. The hues of red, green, and blue may be generated from LEDs or from extracting the frequencies from a broadband source. The modulator system may comprise a time multiplexed single modulator design or a triple modulator design.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: August 3, 2004
    Assignee: International Business Machines Corporation
    Inventor: Chandler T. McDowell
  • Publication number: 20040095561
    Abstract: A method and systems for projecting an image onto a screen in high ambient light. The image is composed as pixels comprising selected intensities of preselected bands of visible light. The pixels are created by modulating three frequencies of light corresponding to hues in the red, green, and blue spectrum. The modulated light selectively generates pixels of a frame of the image. A diffusive projection screen has a triple bandpass light filter surface that selectively transmits preselected bands of light frequencies around the red, green, and blue spectrums of the modulated light source. The triple bandpass light filter is used with projection screens in front and rear projection systems. The hues of red, green, and blue may be generated from LEDs or from extracting the frequencies from a broadband source. The modulator system may comprise a time multiplexed single modulator design or a triple modulator design.
    Type: Application
    Filed: November 14, 2002
    Publication date: May 20, 2004
    Applicant: International Business Machines Corporation
    Inventor: Chandler T. McDowell