Patents by Inventor Chandra Mouli Guda
Chandra Mouli Guda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230393743Abstract: A data storage system having non-volatile media, a buffer memory, a processing device, and a data pre-fetcher. The data pre-fetcher receives commands to be executed in the data storage system, provides the commands as input to a predictive model, obtains at least one command identified for pre-fetching, as output from the predictive model having the commands as input. Prior to the command being executed in the data storage device, the data pre-fetcher retrieves, from the non-volatile memory, at least a portion of data to be used in execution of the command; and stores the portion of data in the buffer memory. The retrieving and storing the portion of the data can be performed concurrently with the execution of many commands before the execution of the command, to reduce the latency impact of the command on other commands that are executed concurrently with the execution of the command.Type: ApplicationFiled: August 23, 2023Publication date: December 7, 2023Inventors: Alex Frolikov, Zachary Andrew Pete Vogel, Joe Gil Mendes, Chandra Mouli Guda
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Patent number: 11740793Abstract: A data storage system having non-volatile media, a buffer memory, a processing device, and a data pre-fetcher. The data pre-fetcher receives commands to be executed in the data storage system, provides the commands as input to a predictive model, obtains at least one command identified for pre-fetching, as output from the predictive model having the commands as input. Prior to the command being executed in the data storage device, the data pre-fetcher retrieves, from the non-volatile memory, at least a portion of data to be used in execution of the command; and stores the portion of data in the buffer memory. The retrieving and storing the portion of the data can be performed concurrently with the execution of many commands before the execution of the command, to reduce the latency impact of the command on other commands that are executed concurrently with the execution of the command.Type: GrantFiled: November 3, 2020Date of Patent: August 29, 2023Assignee: Micron Technology, Inc.Inventors: Alex Frolikov, Zachary Andrew Pete Vogel, Joe Gil Mendes, Chandra Mouli Guda
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Patent number: 11630727Abstract: A memory device includes a plurality of memory die blocks and a plurality of memory channels operably coupled to the plurality of memory die blocks and a memory controller configured to identify one or more memory die blocks as being invalid. The memory controller obtains a first matrix storing a mapping of memory channels to memory die blocks and creates a new mapping of memory channels to memory die blocks excluding the invalid memory die blocks. The new mapping is stored in a second matrix and one or more operations are performed on the memory die blocks based on the new mapping.Type: GrantFiled: March 24, 2021Date of Patent: April 18, 2023Assignee: Micron Technology, Inc.Inventors: Woei Chen Peh, Xiaoxin Zou, Chandra Mouli Guda
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Patent number: 11494111Abstract: A memory device includes a plurality of groups of memory blocks, each group including a plurality of blocks, and each block including a plurality of memory units. A memory controller for the memory device performs operations including maintaining a count of valid memory units in the group for each group and maintaining a count of valid memory units in each block of the memory device. The operations further include selecting a first group based on a count of valid memory units and the first group including a target plurality of blocks. The operations further include selecting a first target block from the target plurality of blocks, determining whether the first target block is to be erased, and erasing the first target block in response to determining that the first target block is to be erased.Type: GrantFiled: December 17, 2020Date of Patent: November 8, 2022Assignee: Micron Technology, Inc.Inventors: Woei Chen Peh, Chandra Mouli Guda
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Publication number: 20220308958Abstract: A memory device includes a plurality of memory die blocks and a plurality of memory channels operably coupled to the plurality of memory die blocks and a memory controller configured to identify one or more memory die blocks as being invalid. The memory controller obtains a first matrix storing a mapping of memory channels to memory die blocks and creates a new mapping of memory channels to memory die blocks excluding the invalid memory die blocks. The new mapping is stored in a second matrix and one or more operations are performed on the memory die blocks based on the new mapping.Type: ApplicationFiled: March 24, 2021Publication date: September 29, 2022Inventors: Woei Chen Peh, Xiaoxin Zou, Chandra Mouli Guda
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Publication number: 20220197535Abstract: A memory device includes a plurality of groups of memory blocks, each group including a plurality of blocks, and each block including a plurality of memory units. A memory controller for the memory device performs operations including maintaining a count of valid memory units in the group for each group and maintaining a count of valid memory units in each block of the memory device. The operations further include selecting a first group based on a count of valid memory units and the first group including a target plurality of blocks. The operations further include selecting a first target block from the target plurality of blocks, determining whether the first target block is to be erased, and erasing the first target block in response to determining that the first target block is to be erased.Type: ApplicationFiled: December 17, 2020Publication date: June 23, 2022Inventors: Woei Chen Peh, Chandra Mouli Guda
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Publication number: 20210048947Abstract: A data storage system having non-volatile media, a buffer memory, a processing device, and a data pre-fetcher. The data pre-fetcher receives commands to be executed in the data storage system, provides the commands as input to a predictive model, obtains at least one command identified for pre-fetching, as output from the predictive model having the commands as input. Prior to the command being executed in the data storage device, the data pre-fetcher retrieves, from the non-volatile memory, at least a portion of data to be used in execution of the command; and stores the portion of data in the buffer memory. The retrieving and storing the portion of the data can be performed concurrently with the execution of many commands before the execution of the command, to reduce the latency impact of the command on other commands that are executed concurrently with the execution of the command.Type: ApplicationFiled: November 3, 2020Publication date: February 18, 2021Inventors: Alex Frolikov, Zachary Andrew Pete Vogel, Joe Gil Mendes, Chandra Mouli Guda
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Patent number: 10852949Abstract: A data storage system having non-volatile media, a buffer memory, a processing device, and a data pre-fetcher. The data pre-fetcher receives commands to be executed in the data storage system, provides the commands as input to a predictive model, obtains at least one command identified for pre-fetching, as output from the predictive model having the commands as input. Prior to the command being executed in the data storage device, the data pre-fetcher retrieves, from the non-volatile memory, at least a portion of data to be used in execution of the command; and stores the portion of data in the buffer memory. The retrieving and storing the portion of the data can be performed concurrently with the execution of many commands before the execution of the command, to reduce the latency impact of the command on other commands that are executed concurrently with the execution of the command.Type: GrantFiled: April 15, 2019Date of Patent: December 1, 2020Assignee: Micron Technology, Inc.Inventors: Alex Frolikov, Zachary Andrew Pete Vogel, Joe Gil Mendes, Chandra Mouli Guda
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Publication number: 20200326851Abstract: A data storage system having non-volatile media, a buffer memory, a processing device, and a data pre-fetcher. The data pre-fetcher receives commands to be executed in the data storage system, provides the commands as input to a predictive model, obtains at least one command identified for pre-fetching, as output from the predictive model having the commands as input. Prior to the command being executed in the data storage device, the data pre-fetcher retrieves, from the non-volatile memory, at least a portion of data to be used in execution of the command; and stores the portion of data in the buffer memory. The retrieving and storing the portion of the data can be performed concurrently with the execution of many commands before the execution of the command, to reduce the latency impact of the command on other commands that are executed concurrently with the execution of the command.Type: ApplicationFiled: April 15, 2019Publication date: October 15, 2020Inventors: Alex Frolikov, Zachary Andrew Pete Vogel, Joe Gil Mendes, Chandra Mouli Guda
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Patent number: 9785563Abstract: A read command is received from a host requesting data from a portion of a first memory of a data storage system and it is determined whether one or more sections of the first memory including the portion have previously been written to by the host. If it is determined that the one or more sections have not previously been written to by the host, predetermined data is sent to the host in response to the read command without reading the portion of the first memory. According to another aspect, the requested data from the read command is cached in a second memory of the data storage system based on whether the one or more sections of the first memory have previously been written to by the host.Type: GrantFiled: August 13, 2015Date of Patent: October 10, 2017Assignee: Western Digital Technologies, Inc.Inventors: Lu Ding, Fyodor Soiguine, Chandra Mouli Guda