Patents by Inventor Chandra Varanasi

Chandra Varanasi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210111873
    Abstract: A method and apparatus for limiting the size of large numbers during numeric calculations, such as during encryption and decryption calculations.
    Type: Application
    Filed: October 11, 2019
    Publication date: April 15, 2021
    Inventor: Chandra Varanasi
  • Publication number: 20200220558
    Abstract: A method and apparatus is described for assigning columns of an LDPC H matrix to a plurality of decoding logics for efficient decoding of codewords. The rows of the LDPC H matrix are evaluated in a number of different orderings, and for each row in each ordering, a number of columns containing non-zero circulants are determined that cannot be evenly distributed to a plurality of decoding logics. As each row is evaluated, one or more columns of the LDPC H matrix are assigned to temporary bins for storage. After the LDPC H matrix has been evaluated a plurality of times, the arrangement that resulted in the fewest number of “mismatched” columns is selected, and the columns of the LDPC H matrix that were assigned to the temporary storage bins for that particular row arrangement is used to assign the columns in the bins to the plurality of decoding logics.
    Type: Application
    Filed: December 20, 2018
    Publication date: July 9, 2020
    Inventors: Ko-Chung Tseng, Chandra Varanasi, Engling Yeo
  • Patent number: 10606697
    Abstract: A method and apparatus for improved data recovery in data storage systems is described. When errors occur while retrieving a plurality of codewords from a plurality of storage devices, a long vector may be formed from the plurality of codewords and decoded by a special, long parity check matrix to re-create data stored on the plurality of storage devices when normal decoding efforts fail.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: March 31, 2020
    Assignee: Goke US Research Laboratory
    Inventors: Chandra Varanasi, Engling Yeo
  • Publication number: 20200081778
    Abstract: A system, method and apparatus for encoding and decoding data in a distributed data storage and retrieval system. Data destined for storage is converted into information vectors, and the information vectors are multiplied by a binary encoder matrix to form systematic codewords. The binary encoder matrix is formed as a binary representation of an encoding matrix, the encoding matrix matrix comprising an identity matrix and a special Cauchy matrix, where each element in encoding matrix is an element of an extension field.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Inventor: Chandra Varanasi
  • Publication number: 20190391870
    Abstract: A method and apparatus for improved data recovery in data storage systems is described. When errors occur while retrieving a plurality of codewords from a plurality of storage devices, a long vector may be formed from the plurality of codewords and decoded by a special, long parity check matrix to re-create data stored on the plurality of storage devices when normal decoding efforts fail.
    Type: Application
    Filed: June 21, 2018
    Publication date: December 26, 2019
    Inventors: Chandra Varanasi, Engling Yeo
  • Publication number: 20190379399
    Abstract: Apparatuses and methods suitably configured to utilize at least one algorithm for generating log-likelihood-ratio (LLR) values for low-density-parity-check (LDPC) codes used in flash memory-based systems. Additionally, at least one algorithm sets soft-read thresholds in the memory in such a way as to maximize the mutual information (MI) of the channel created by those thresholds for preventing errors.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventor: Chandra Varanasi
  • Patent number: 10476524
    Abstract: A method and apparatus is described for assigning columns of an LDPC H matrix to a plurality of decoding logics for efficient decoding of codewords. The rows of the LDPC H matrix are evaluated in a number of different orderings, and for each row in each ordering, a number of columns containing non-zero circulants are determined that cannot be evenly distributed to a plurality of decoding logics. As each row is evaluated, one or more columns of the LDPC H matrix are assigned to temporary bins for storage. After the LDPC H matrix has been evaluated a plurality of times, the arrangement that resulted in the fewest number of “mismatched” columns is selected, and the columns of the LDPC H matrix that were assigned to the temporary storage bins for that particular row arrangement is used to assign the columns in the bins to the plurality of decoding logics.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: November 12, 2019
    Assignee: Goke US Research Laboratory
    Inventors: Ko-Chung Tseng, Chandra Varanasi, Engling Yeo
  • Patent number: 10419026
    Abstract: A method and apparatus for efficient data decoding is described. Data is encoded by an LDPC encoder using a G matrix. An LDPC decoder uses a modified H matrix to decode encoded blocks of data, the modified H matrix having at least two columns of its circulants swapped with each other. The encoded blocks of data are stored, decoded and reconstructed in an order that considers the circulants in the columns that have been swapped.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: September 17, 2019
    Assignee: Goke US Research Laboratory
    Inventors: Ko-Chung Tseng, Chandra Varanasi, Engling Yeo
  • Publication number: 20190266111
    Abstract: A system, method and apparatus for performing high data throughput computations is disclosed. An I/O device, such as a solid state hard drive (SSD), is configured with programmable circuitry, in addition to traditional data storage and retrieval components. A host processor configures the programmable circuitry to perform one of any number of high data throughput computations using the same data storage and retrieval protocol used to store data on the I/O device.
    Type: Application
    Filed: February 27, 2018
    Publication date: August 29, 2019
    Inventors: Engling Yeo, Chandra Varanasi
  • Publication number: 20190165809
    Abstract: A method and apparatus is described for assigning columns of an LDPC H matrix to a plurality of decoding logics for efficient decoding of codewords. The rows of the LDPC H matrix are evaluated in a number of different orderings, and for each row in each ordering, a number of columns containing non-zero circulants are determined that cannot be evenly distributed to a plurality of decoding logics. As each row is evaluated, one or more columns of the LDPC H matrix are assigned to temporary bins for storage. After the LDPC H matrix has been evaluated a plurality of times, the arrangement that resulted in the fewest number of “mismatched” columns is selected, and the columns of the LDPC H matrix that were assigned to the temporary storage bins for that particular row arrangement is used to assign the columns in the bins to the plurality of decoding logics.
    Type: Application
    Filed: December 20, 2017
    Publication date: May 30, 2019
    Inventors: Ko-Chung Tseng, Chandra Varanasi, Engling Yeo
  • Publication number: 20190165810
    Abstract: A method and apparatus for efficient data decoding is described. Data is encoded by an LDPC encoder using a G matrix. An LDPC decoder uses a modified H matrix to decode encoded blocks of data, the modified H matrix having at least two columns of its circulants swapped with each other. The encoded blocks of data are stored, decoded and reconstructed in an order that considers the circulants in the columns that have been swapped.
    Type: Application
    Filed: November 27, 2017
    Publication date: May 30, 2019
    Inventors: Ko-Chung Tseng, Chandra Varanasi, Engling Yeo
  • Publication number: 20070006058
    Abstract: A data detector for use in a communication channel is provided. The data detector includes a path metric unit, which is configured to operate at a rate of at least two samples per clock cycle. The path metric unit includes multiple add units and multiple compare units. In the determination of a lowest path-metric among multiple paths that reach a state, at least one of the multiple add units of the path metric unit operates in parallel with at least one of its multiple compare units, thereby reducing a critical path in the path metric unit.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Applicant: Seagate Technology LLC
    Inventor: Chandra Varanasi
  • Publication number: 20060181439
    Abstract: A method and apparatus are provided for decoding a sequence of code words into a sequence of data words. Each code word includes an encoded data word and an indicator bit. The encoded data word is extracted unchanged into a respective unencoded data word if an indicator bit has a first binary value and is extracted into the unencoded data word and then complemented if the indicator bit has a second, opposite binary value.
    Type: Application
    Filed: April 11, 2006
    Publication date: August 17, 2006
    Applicant: Seagate Technology LLC
    Inventors: Chandra Varanasi, Kinhing Tsang
  • Publication number: 20050104754
    Abstract: A method and apparatus are provided for encoding and decoding digital information. A sequence of data words is received, wherein each data word has a running digital sum (RDS). The sequence of data words is encoded into a sequence of corresponding code words, which has a current RDS. For each data word a binary symbol is added to the data word and the data word is selectively complemented as a function of the RDS of the data word and the current RDS of the sequence of code words to form the corresponding code word.
    Type: Application
    Filed: November 17, 2003
    Publication date: May 19, 2005
    Inventors: Chandra Varanasi, Kinhing Tsang