Patents by Inventor Chandrakanth Chappidi

Chandrakanth Chappidi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949390
    Abstract: A load modulated balanced amplifier (LMBA) circuit can include an input pad of the LMBA circuit configured to receive an input signal on a semiconductor die. A transformer-based hybrid splitter can be coupled to the input pad and configured to provide a first split input signal and a second split input signal from the input signal. A control power amplifier circuit coupled the first split input signal and a power amplifier circuit coupled to the second split input signal.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: April 2, 2024
    Assignee: The Trustees of Princeton University
    Inventors: Tushar Sharma, Chandrakanth Chappidi, Zheng Liu, Kaushik Sengupta
  • Publication number: 20210218375
    Abstract: A load modulated balanced amplifier (LMBA) circuit can include an input pad of the LMBA circuit configured to receive an input signal on a semiconductor die. A transformer-based hybrid splitter can be coupled to the input pad and configured to provide a first split input signal and a second split input signal from the input signal. A control power amplifier circuit coupled the first split input signal and a power amplifier circuit coupled to the second split input signal.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 15, 2021
    Inventors: Tushar Sharma, Chandrakanth Chappidi, Zheng Liu, Kaushik Sengupta
  • Patent number: 10886963
    Abstract: Embodiments generally disclosed herein relate to a sub-wavelength multi-port codesign approach between the unit transceiver element and the integrated EM interface to enable a generalized broadband MIMO array with individually programmable element patterns. The co-design approach allows processing of radiated signals at the antenna level distinct from classical arrays. The transmitter and receiver architectures with the integrated EM interface are implemented in 65-nm CMOS and have a bandwidth of 37-73 GHz. Wireless links with data rates up to 12 Gb/s are demonstrated across the spectrum with a wide range of reconfigurability of the active EM interface. The multifunctional EM interface and the broadband transceivers can enable future efficient and compact MIMO arrays for reliable links exploiting frequency, spatial, pattern and polarization diversities.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: January 5, 2021
    Assignee: THE TRUSTEES OF PRINCETON UNIVERSITY
    Inventors: Kaushik Sengupta, Xue Wu, Chandrakanth Chappidi, Xuyang Lu
  • Publication number: 20190393921
    Abstract: Embodiments generally disclosed herein relate to a sub-wavelength multi-port codesign approach between the unit transceiver element and the integrated EM interface to enable a generalized broadband MIMO array with individually programmable element patterns. The co-design approach allows processing of radiated signals at the antenna level distinct from classical arrays. The transmitter and receiver architectures with the integrated EM interface are implemented in 65-nm CMOS and have a bandwidth of 37-73 GHz. Wireless links with data rates up to 12 Gb/s are demonstrated across the spectrum with a wide range of reconfigurability of the active EM interface. The multifunctional EM interface and the broadband transceivers can enable future efficient and compact MIMO arrays for reliable links exploiting frequency, spatial, pattern and polarization diversities.
    Type: Application
    Filed: June 26, 2019
    Publication date: December 26, 2019
    Applicant: The Trustees of Princeton University
    Inventors: Kaushik Sengupta, Xue Wu, Chandrakanth Chappidi, Xuyang Lu