Patents by Inventor Chang-bum Lee

Chang-bum Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120018695
    Abstract: Example embodiments, relate to a non-volatile memory element and a memory device including the same. The non-volatile memory element may include a memory layer having a multi-layered structure between two electrodes. The memory layer may include first and second material layers and may show a resistance change characteristic due to movement of ionic species therebetween. The first material layer may be an oxygen-supplying layer. The second material layer may be an oxide layer having a multi-trap level.
    Type: Application
    Filed: May 24, 2011
    Publication date: January 26, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-soo Lee, Man Chang, Young-bae Kim, Myoung-jae Lee, Chang-bum Lee, Seung-ryul Lee, Chang-jung Kim, Ji-hyun Hur
  • Publication number: 20110310652
    Abstract: Methods of operating semiconductor devices that include variable resistance devices, the methods including writing first data to a semiconductor device by applying a reset pulse voltage to the variable resistance device so that the variable resistance device is switched from a first resistance state to a second resistance state, and writing second data to the semiconductor device by applying a set pulse voltage to the variable resistance device so that the variable resistance device is switched from the second resistance state to the first resistance state to the second resistance state.
    Type: Application
    Filed: November 16, 2010
    Publication date: December 22, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young-bae Kim, Chang-bum Lee, Dong-soo Lee, Chang-jung Kim, Myoung-jae Lee, Man Chang, Seung-ryul Lee
  • Publication number: 20110220860
    Abstract: Bipolar memory cells and a memory device including the same are provided, the bipolar memory cells include two bipolar memory layers having opposite programming directions. The two bipolar memory layers may be connected to each other via an intermediate electrode interposed therebetween. The two bipolar memory layers may have the same structure or opposite structures.
    Type: Application
    Filed: February 15, 2011
    Publication date: September 15, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-jung Kim, Young-bae Kim, Ji-hyun Hur, Dong-soo Lee, Man Chang, Chang-bum Lee, Seung-ryul Lee
  • Patent number: 7989791
    Abstract: Provided are a diode structure and a memory device including the same. The diode structure includes: a first electrode; a p-type Cu oxide layer formed on the first electrode; an n-type InZn oxide layer formed on the p-type Cu oxide layer; and a second electrode formed on the n-type InZn oxide.
    Type: Grant
    Filed: March 17, 2008
    Date of Patent: August 2, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-soo Kang, Stefanovich Genrikh, Young-soo Park, Myoung-jae Lee, Seung-eon Ahn, Chang-bum Lee
  • Publication number: 20110161605
    Abstract: A memory device includes a memory cell. The memory cell includes: a bipolar memory element and a bidirectional switching element. The bidirectional switching element is connected to ends of the bipolar memory element, and has a bidirectional switching characteristic. The bidirectional switching element includes: a first switching element and a second switching element. The first switching element is connected to a first end of the bipolar memory element and has a first switching direction. The second switching element is connected to a second end of the bipolar memory element and has a second switching direction. The second switching direction is opposite to the first switching direction.
    Type: Application
    Filed: November 18, 2010
    Publication date: June 30, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Myoung-jae Lee, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee
  • Publication number: 20110147696
    Abstract: A resistive random access memory (RRAM) devices and resistive random access memory (RRAM) arrays are provided, the RRAM devices include a first electrode layer, a variable resistance material layer formed of an oxide of a metallic material having a plurality of oxidation states, an intermediate electrode layer on the variable resistance material layer and formed of a conductive material having a lower reactivity with oxygen than the metallic material, and a second electrode layer on the intermediate electrode layer. The RRAM arrays include at least one of the aforementioned RRAM devices.
    Type: Application
    Filed: August 19, 2010
    Publication date: June 23, 2011
    Inventors: Dong-soo Lee, Chang-bum Lee, Chang-jung Kim
  • Patent number: 7935952
    Abstract: Provided are a non-volatile memory device having a threshold switching resistor, a memory array including the non-volatile memory device, and methods of manufacturing the same. A non-volatile memory device having a threshold switching resistor may include a first resistor having threshold switching characteristics, an intermediate electrode on the first resistor, and a second resistor having at least two resistance characteristics on the intermediate electrode.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: May 3, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung-jae Lee, Young-soo Park, Chang-bum Lee
  • Publication number: 20110049464
    Abstract: A resistive random access memory (RRAM) includes a resistive memory layer of a transition metal oxide, such as Ni oxide, and is doped with a metal material. The RRAM may include at least one first electrode, a resistive memory layer on the at least one first electrode, the resistive memory layer including a Ni oxide layer doped with at least one element selected from a group consisting of Fe, Co, and Sn, and at least one second electrode on the resistive memory layer. The RRAM device may include a plurality of first electrodes and a plurality of second electrodes, and the resistive memory layer may be between the plurality of first electrodes and the plurality of second electrodes.
    Type: Application
    Filed: July 30, 2010
    Publication date: March 3, 2011
    Inventors: Chang-bum Lee, Dong-soo Lee, Chang-Jung Kim
  • Publication number: 20100133496
    Abstract: A RRAM may include a first electrode, a second electrode, and a memory resistant layer between the first and second electrodes, wherein the memory resistant layer may include a transition metal oxide doped with a metal having a high oxygen affinity. Because a RRAM includes a memory resistant layer doped with a material having a high oxygen affinity, the RRAM may be stably driven at higher temperatures.
    Type: Application
    Filed: October 9, 2009
    Publication date: June 3, 2010
    Inventors: Chang-bum Lee, Chang-jung Kim, Dong-soo Lee
  • Publication number: 20090243115
    Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes: a memory array on a first substrate; and a peripheral circuit on a second substrate, wherein the first substrate and the second substrate may be attached to each other so that the memory array and the peripheral circuit are electrically connected to each other.
    Type: Application
    Filed: November 21, 2008
    Publication date: October 1, 2009
    Inventors: Myoung-jae Lee, Young-soo Park, Chang-bum Lee, Seung-eon Ahn, Ki-hwan Kim, Bo-soo Kang
  • Publication number: 20090184396
    Abstract: Provided are resistive random access memories (RRAMs) and methods of manufacturing the same. A RRAM includes a storage node including a variable resistance layer, a switching device connected to the storage node, and a protective layer covering an exposed part of the variable resistance layer. The protective layer includes at least one of aluminum oxide and titanium oxide. The variable resistance layer is a metal oxide layer.
    Type: Application
    Filed: October 20, 2008
    Publication date: July 23, 2009
    Inventors: Ki-hwan Kim, Young-soo Park, Myung-jae Lee, Xianyu Wenxu, Seung-eon Ahn, Chang-bum Lee
  • Publication number: 20090184305
    Abstract: A resistive memory device includes a first electrode and a first insulation layer arranged on the first electrode. A portion of the first electrode is exposed through a first hole in the first insulation layer. A first variable resistance layer contacts the exposed portion of the first electrode and extends on the first insulation layer around the first hole. A first switching device electrically connects to the first resistive switching layer.
    Type: Application
    Filed: August 26, 2008
    Publication date: July 23, 2009
    Inventors: Chang-bum Lee, Young-soo Park, Myung-jae Lee, Xianyu Wenxu, Bo-soo Kang, Seung-eon Ahn, Ki-hwan Kim
  • Publication number: 20090116272
    Abstract: Provided are a non-volatile memory device and a cross-point memory array including the same which have a diode characteristic enabling the non-volatile memory device and the cross-point memory array including the same to operate in a simple structure, without requiring a switching device separately formed so as to embody a high density non-volatile memory device. The non-volatile memory device includes a first electrode; a diode-storage node formed on the first electrode; and a second electrode formed on the diode-storage node.
    Type: Application
    Filed: July 7, 2008
    Publication date: May 7, 2009
    Inventors: Ki-hwan Kim, Young-soo Park, Bo-soo Kang, Myoung-jae Lee, Chang-bum Lee
  • Publication number: 20090095985
    Abstract: Provided may be a multi-layer electrode, a cross point resistive memory array and method of manufacturing the same. The array may include a plurality of first electrode lines arranged parallel to each other; a plurality of second electrode lines crossing the first electrode lines and arranged parallel to each other; and a first memory resistor at intersections between the first electrode lines and the second electrode lines, wherein at least one of the first electrode lines and the second electrode lines have a multi-layer structure including a first conductive layer and a second conductive layer formed of a noble metal.
    Type: Application
    Filed: June 5, 2008
    Publication date: April 16, 2009
    Inventors: Chang-bum LEE, Young-soo PARK, Myoung-jae LEE, Stefanovich GENRIKH, Ki-hwan KIM
  • Publication number: 20090072246
    Abstract: Provided are a diode and a memory device comprising the diode. The diode includes a p-type semiconductor layer and an n-type semiconductor layer, wherein at least one of the p-type semiconductor layer and the n-type semiconductor layer comprises a resistance changing material whose resistance is changed according to a voltage applied to the resistance changing material.
    Type: Application
    Filed: March 17, 2008
    Publication date: March 19, 2009
    Inventors: Stefanovich Genrikh, Bo-soo Kang, Young-soo Park, Xianyu Wenxu, Myoung-Jae Lee, Seung-eon Ahn, Chang-bum Lee
  • Publication number: 20090045429
    Abstract: Provided are a diode structure and a memory device including the same. The diode structure includes: a first electrode; a p-type Cu oxide layer formed on the first electrode; an n-type InZn oxide layer formed on the p-type Cu oxide layer; and a second electrode formed on the n-type InZn oxide.
    Type: Application
    Filed: March 17, 2008
    Publication date: February 19, 2009
    Inventors: Bo-soo Kang, Stefanovich Genrikh, Young-soo Park, Myoung-jae Lee, Seung-eon Ahn, Chang-bum Lee
  • Publication number: 20080296550
    Abstract: Provided may be a resistive random access memory (RRAM) device and methods of manufacturing and operating the same. The resistive random access memory device may include at least one first electrode, at least one second electrode spaced apart from the at least one first electrode, a first structure including a first resistance-changing layer between the at least one first and second electrodes, and a first switching element electrically connected to the first resistance-changing layer, wherein at least one of the first and second electrodes include an alloy layer having a noble metal and a base metal.
    Type: Application
    Filed: May 8, 2008
    Publication date: December 4, 2008
    Inventors: Chang-bum Lee, Young-soo Park, Xianyu Wenxu, Bo-soo Kang, Seung-eon Ahn
  • Patent number: 5848057
    Abstract: An apparatus is provided for accurately estimating an equivalent bandwidth of a variable bit rate Moving Picture Expert Group in Asynchronous Transfer Mode (ATM) by which an effective connection admission control of VBR MPEG video traffic in ATM network can be performed. The apparatus includes a traffic splitting unit for splitting into the respective frames, a frame traffic calculating unit for performing the approximation for calculating the equivalent bandwidth for the first aggregated frame, a frame traffic combining unit for combining the above two frames, an approximation unit for approximating the resultant moments of the combined frame traffic, a first equivalent bandwidth calculating unit for calculating the equivalent bandwidth of the combined aggregated frame traffic, and a second equivalent bandwidth calculating unit for adding the calculated equivalent bandwidths.
    Type: Grant
    Filed: April 3, 1997
    Date of Patent: December 8, 1998
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
    Inventors: Chang-Bum Lee, Kyeong-Bong Ha, Rae-Hong Park