Abstract: A method for manufacturing a wafer level chip size package and the method comprises the steps of: securing wafer to a partly etched lead frame, drilling blind hole and filling conductive material after packaging the lead frame to electrically connect the lead frame and the wafer, thus providing inner electrical connection of the wafer after packaging.

Abstract: A semiconductor package for fixed surface mounting is disclosed, such as QFN, SON. The package includes a die, an encapsulant body sealing the die, a die pad supporting the die, and a plurality of leads electrically connecting with the die. The surface of die pad exposing outside the encapsulant body has grooves formed for improving the surface mounting to a printed circuit board.

Abstract: A method for underfilling bonding gap between flip-chip and circuit substrate is disclosed. A chip is mounted on a circuit substrate with flip-chip configuration. The circuit substrate has a top surface, a bottom surface, and a plurality of via holes. Some of the via holes are formed to be air vents passing through the top surface and the bottom surface. So that the underfill material flows into the gap between flip-chip and circuit substrate until jamming or blocking the said air vents rapidly while underfilling.

Abstract: A QFN semiconductor package comprises a semiconductor die, a lead frame, bonding wires and a molding compound. The die has an upward topside with a plurality of bonding pads. The lead frame consists of a plurality of inner leads, wherein each inner lead is divided into the front finger portion, the middle protruding portion and the rare connecting portion. The front finger portion is the position of the inner lead to which a bonding wire wire-bonds from the bonding pad of the die. The rare connecting portion is for the electrical out-connection of the package. The middle protruding portion is at height level higher than the front finger portion and the rare connecting portion. The bonding wires electrically connect the bonding pads of the die with the front finger portions of inner leads by means of wire-bonding.

Abstract: A method for manufacturing a wafer level chip size package and the method comprises the steps of: securing wafer to a partly etched lead frame, drilling blind hole and filling conductive material after packaging the lead frame to electrically connect the lead frame and the wafer, thus providing inner electrical connection of the wafer after packaging.

Abstract: A method for manufacturing a chip size package comprises the steps of: providing a chip having a plurality of bonding pads on its active surface; providing a metal board consisting of the upper layer and the lower layer, wherein, a chip carrier, corresponding to said least chip, being formed on the surface of the upper layer of the said metal board; selectively etching the upper layer of the metal board to form a plurality of redistribution conductive circuits supported by the lower layer of the metal board; securing the chip to the chip carrier of the upper layer of the metal board, and electrically connecting to the conductive circuits; providing a package body (or underfill) in between the chip and the upper layer of the metal board; and, removing the lower layer of the metal board. Thus, package manufactured by applying present invention has ability of securing more electrodes and thinner thickness.

Abstract: A stackable QFN semiconductor package comprises a die, a lead frame, an electrical connection device, and a molding compound. The die has a plurality of bonding pads on its topside. The lead frame consists of a plurality of inner leads around edge of the die and each inner lead is divided into the body and the finger extending from the body. The body is thicker than the die and exposes its upper surface and lower surface for outer electrical connection of the package. The finger extends from the body to above the topside of the die. An electrical connection device connects the bonding pad of die and the finger of inner lead, thus electrically connect the die and the inner lead of lead frame. A molding compound seals around outer edge of the inner lead and seals off at least said electrical connection device; therefore provide ability of stack, thinner package and simplicity.