Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device structure includes a semiconductor substrate and an interconnection structure over the semiconductor substrate. The semiconductor device structure also includes a first conductive pillar over the interconnection structure. The first conductive pillar has a first protruding portion extending towards the semiconductor substrate from a lower surface of the first conductive pillar. The semiconductor device structure further includes a second conductive pillar over the interconnection structure. The second conductive pillar has a second protruding portion extending towards the semiconductor substrate from a lower surface of the second conductive pillar. The first conductive pillar is closer to a center point of the semiconductor substrate than the second conductive pillar. A bottom of the second protruding portion is wider than a bottom of the first protruding portion.

Abstract: A semiconductor device includes a substrate, an interconnect structure, and conductive vias. The substrate has a first side, a second side and a sidewall connecting the first side and the second side, wherein the sidewall includes a first planar sidewall of a first portion of the substrate, a second planar sidewall of a second portion of the substrate and a curved sidewall of a third portion of the substrate, where the first planar sidewall is connected to the second planar sidewall through the curved sidewall. The interconnect structure is located on the first side of the substrate, where a sidewall of the interconnect structure is offset from the second planar sidewall. The conductive vias are located on the interconnect structure, where the interconnect structure is located between the conductive vias and the substrate.

Abstract: A method includes attaching a package component to a package substrate, the package component includes: an interposer disposed over the package substrate; a first die disposed along the interposer; and a second die disposed along the interposer, the second die being laterally adjacent the first die; attaching a first thermal interface material to the first die, the first thermal interface material being composed of a first material; attaching a second thermal interface material to the second die, the second thermal interface material being composed of a second material different from the first material; and attaching a lid assembly to the package substrate, the lid assembly being further attached to the first thermal interface material and the second thermal interface material.

Abstract: A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.

Abstract: An apparatus for forming a package structure is provided. The apparatus includes a processing chamber for bonding a first package component and a second package component. The apparatus also includes a bonding head disposed in the processing chamber. The bonding head includes a plurality of vacuum tubes communicating with a plurality of vacuum devices. The apparatus further includes a nozzle connected to the bonding head and configured to hold the second package component. The nozzle includes a plurality of first holes that overlap the vacuum tubes. The nozzle also includes a plurality of second holes offset from the first holes, wherein the second holes overlap at least two edges of the second package component. In addition, the apparatus includes a chuck table disposed in the processing chamber, and the chuck table is configured to hold and heat the first package component.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate, active devices and transparent conductive patterns. The active devices are formed on the semiconductor substrate. The transparent conductive patterns are formed over the active devices and electrically connected to the active devices. The transparent conductive patterns are made of a metal oxide material. The metal oxide material has a first crystalline phase with a prefer growth plane rich in oxygen vacancy, and has a second crystalline phase with a prefer growth plane poor in oxygen vacancy.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an interconnection structure over a semiconductor substrate and a conductive pillar over the interconnection structure. The conductive pillar has a protruding portion extending towards the semiconductor substrate from a lower surface of the conductive pillar. The semiconductor device structure also includes an upper conductive via between the conductive pillar and the interconnection structure and a lower conductive via between the upper conductive via and the interconnection structure. The lower conductive via is electrically connected to the conductive pillar through the upper conductive via. The conductive pillar extends across opposite sidewalls of the upper conductive via and opposite sidewalls of the lower conductive via. A top view of an entirety of the second conductive via is separated from a top view of an entirety of the protruding portion.

Abstract: Provided are a package structure and a method of forming the same. The method includes providing a first package having a plurality of first dies and a plurality of second dies therein; performing a first sawing process to cut the first package into a plurality of second packages, wherein one of the plurality of second packages comprises three first dies and one second die; and performing a second sawing process to remove the second die of the one of the plurality of second packages, so that a cut second package is formed into a polygonal structure with the number of nodes greater than or equal to 5.

Abstract: A composite substrate including a substrate, a buffer layer, and a strain release layer. The buffer layer is disposed on the substrate is provided. The strain release layer is disposed on the buffer layer, wherein the buffer layer is between the substrate and the strain release layer. A material of the strain release layer includes Al1-xGaxN, where 0?x<0.15. The strain release layer is doped with silicon to release a compressive strain due to the buffer layer. A concentration of silicon doped in the strain release layer is greater than 1019 cm?3. A defect density of the strain release layer is less than or equal to 5×109/cm2. A light-emitting diode is also provided.

Abstract: A cooling tower control method, used for controlling a cooling tower having at least one sensor, includes: receiving and processing a received sensor data; based on the received sensor data, timing training a water outlet temperature prediction model; receiving a target water outlet temperature; traverse searching a plurality of control parameter combinations meeting the target water outlet temperature; selecting an energy-saving target control parameter combination from the plurality of control parameter combinations meeting the target water outlet temperature; and controlling the cooling tower based on the target control parameter combination.

Abstract: An ultraviolet C light-emitting diode including an n-type semiconductor layer, a p-type semiconductor layer, an active layer, a two-dimensional hole gas (2DHG) inducing layer, and an electron blocking layer is provided. The active layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer, wherein a wavelength of a maximum peak of a spectrum emitted by the active layer ranges from 230 nm to 280 nm. The two-dimensional hole gas (2DHG) inducing layer is disposed between the active layer and the p-type semiconductor layer. A concentration of magnesium in the 2DHG inducing layer is less than 1017 atoms/cm3. The electron blocking layer is disposed between the p-type semiconductor layer and the 2DHG inducing layer. A concentration of magnesium in a part of the electron blocking layer adjacent to the 2DHG inducing layer is greater than 1019 atoms/cm3.

Abstract: Disclosed here compositions and methods suitable for injection of a nanosurfactant composition into a hydrocarbon-bearing formation for enhanced recovery operations. The nanosurfactant composition includes nanoassemblies that contain a petroleum sulfonate surfactant, mineral oil, a zwitterionic co-surfactant, and a cationic co-surfactant.

Abstract: Embodiments of the disclosure provide compositions and methods suitable for injection of a nanosurfactant composition into a hydrocarbon-bearing formation for enhanced recovery operations. The nanosurfactant composition includes nanoassemblies that contain a petroleum sulfonate surfactant, mineral oil, a zwitterionic co-surfactant. The nanosurfactant composition also includes a functionalized zwitterionic copolymer present in an aqueous environment.

Abstract: A light emitting chip and associated package structure are provided. The light emitting chip includes a substrate, a first type layer, an active layer, a second type layer, a first type electrode and a second type electrode. A second portion of the first type layer is located over the substrate. A first portion of the first type layer is located over the second portion of the first type layer. The active layer is located over the first portion of the first type layer. The second type layer is located over the active layer. The first type electrode is contacted with a top surface and a sidewall of the second portion of the first type layer and contacted with a portion of a sidewall of the substrate. The second type electrode is contacted with the second type layer.

Abstract: A composite substrate including a substrate, a buffer layer, and a strain release layer. The buffer layer is disposed on the substrate is provided. The strain release layer is disposed on the buffer layer, wherein the buffer layer is between the substrate and the strain release layer. A material of the strain release layer includes Al1-xGaxN, where 0?x<0.15. The strain release layer is doped with silicon to release a compressive strain due to the buffer layer. A concentration of silicon doped in the strain release layer is greater than 1019 cm?3. A defect density of the strain release layer is less than or equal to 5×109/cm2. A light-emitting diode is also provided.

Abstract: An ultraviolet C light-emitting diode including an n-type semiconductor layer, a p-type semiconductor layer, an active layer, a two-dimensional hole gas (2DHG) inducing layer, and an electron blocking layer is provided. The active layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer, wherein a wavelength of a maximum peak of a spectrum emitted by the active layer ranges from 230 nm to 280 nm. The two-dimensional hole gas (2DHG) inducing layer is disposed between the active layer and the p-type semiconductor layer. A concentration of magnesium in the 2DHG inducing layer is less than 1017 atoms/cm3. The electron blocking layer is disposed between the p-type semiconductor layer and the 2DHG inducing layer. A concentration of magnesium in a part of the electron blocking layer adjacent to the 2DHG inducing layer is greater than 1019 atoms/cm3.

Abstract: Disclosed here compositions and methods suitable for injection of a nanosurfactant composition into a hydrocarbon-bearing formation for enhanced recovery operations. The nanosurfactant composition includes nanoassemblies that contain a petroleum sulfonate surfactant, mineral oil, a zwitterionic co-surfactant, and a cationic co-surfactant.

Abstract: Embodiments of the disclosure provide compositions and methods suitable for injection of a nanosurfactant composition into a hydrocarbon-bearing formation for enhanced recovery operations. The nanosurfactant composition includes nanoassemblies that contain a petroleum sulfonate surfactant, mineral oil, a zwitterionic co-surfactant. The nanosurfactant composition also includes a functionalized zwitterionic copolymer present in an aqueous environment.

Abstract: A light emitting chip and associated package structure are provided. The light emitting chip includes a substrate, a first type layer, an active layer, a second type layer, a first type electrode and a second type electrode. A second portion of the first type layer is located over the substrate. A first portion of the first type layer is located over the second portion of the first type layer. The active layer is located over the first portion of the first type layer. The second type layer is located over the active layer. The first type electrode is contacted with a sidewall of the second portion of the first type layer and contacted with a sidewall of the substrate. The second type electrode is contacted with the second type layer.

Abstract: A thermal conductive plastic material, comprising: a plastic solution; a first thermal conductive material, filled and distributed in the plastic solution, being processed by an Atmospheric Pressure Plasma (APP) technology, and having its surface provided with hydrophilic functional groups; and a second thermal conductive material, filled and distributed in the plastic solution, being processed by the Atmospheric Pressure Plasma (APP) technology or chemical modification, and having its surface provided with hydrophilic functional groups. Wherein, the first thermal conductive material is formed by ceramic powders, the second thermal conductive material is formed by carbon-containing ingredient, while the first thermal conductive material and the second thermal conductive material are in touch with each other.