Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first fin structure and a second fin structure over a substrate. The method includes forming a dielectric layer over the substrate, the first fin structure, and the second fin structure. The method includes forming a first work function layer in the first trench and the second trench. The method includes forming a first mask layer over the first work function layer in the first trench. The method includes removing the first work function layer exposed by the first mask layer. The method includes removing the first mask layer. The method includes forming a first gate electrode in the first trench and a second gate electrode in the second trench. The method includes forming a first hard mask layer in the first trench and a second hard mask layer in the second trench.

Abstract: The present technology relates to an electronic device. A memory device including a plurality of memory cells connected to a plurality of word lines arranged between a plurality of source select lines and a plurality of drain select lines, a peripheral circuit configured to perform a program operation of programming data in selected memory cells among the plurality of memory cells, and a program operation controller configured to control the peripheral circuit to apply a voltage, for turning on or off source select transistors connected to the plurality of source select lines, to the plurality of source select lines, while applying a pass voltage to the plurality of word lines after applying a program voltage to selected word lines connected to the selected memory cells.

Abstract: A device includes a semiconductor fin semiconductor fin extending from a substrate, a gate structure extending across the semiconductor fin, and a multilayer gate spacer on a sidewall of the gate structure. The multilayer gate spacer includes an inner spacer layer, an outer spacer layer, and a dielectric structure. The inner spacer layer has a vertical portion extending along the sidewall of the gate structure, and a lateral portion laterally extending from the vertical portion in a direction away from the gate structure. The outer spacer layer is spaced apart from the vertical portion of the inner spacer layer by an air gap. The dielectric structure spaces apart a bottom end of the outer spacer layer from the lateral portion of the inner spacer layer.

Abstract: Provided are a display panel, a preparation method thereof, and a display device. The display panel includes a display substrate and a touch panel. The touch panel includes multiple touch electrodes. At least one of the touch electrodes includes multiple grid patterns enclosed by metal wires. At least one of the grid patterns includes a first edge, second edge, third edge and fourth edge that form a ring. The first edge and the third edge extend in a second direction. The second edge and the fourth edge extend in a first direction. A shape of the grid pattern includes a first curved ring, a second curved ring, a third curved ring, or a fourth curved ring. A first edge and third edge of the first curved ring are curves curved towards a direction opposite to the first direction.

Abstract: A fuel pump module for a vehicle includes: a pump positioned in a reservoir cup in a tank and configured to suction and discharge fuel from the reservoir cup; a mount plate mounted in an opening of the tank; a return valve on the mount plate and configured to pass return fuel, which is returned from an engine, into the tank; a shaft bracket connecting the mount plate and the pump in the tank and configured to fix the pump to the mount plate; a guide wall disposed on the shaft bracket to guide return fuel flowing in the tank through the return valve; and a channel disposed at the shaft bracket so that return fuel flows down and configured to discharge the return fuel into the reservoir cup.

Abstract: A display device includes a display panel including a pixel and a sensor pixel, the pixel including a light emitting element and a driving transistor controlling a current flowing through the light emitting element, the sensor pixel including sensor transistors, a data driver that supplies a data signal to the pixel through a data line and provides a sensor data signal to the sensor pixel through a sensor data line, and a sensing driver that obtains sensing information on a current flowing through the sensor pixel. The sensor transistors are electrically connected in parallel to each other and are commonly electrically connected to the sensor data line. The sensor transistors and the driving transistor include a substantially same characteristic.

Abstract: The disclosure relates to a fluorescence resonance energy transfer (FRET)-based biosensor for sensing chimeric antigen receptor (CAR) activity and use thereof, and in particular, to a FRET-based biosensor, which simultaneously detects binding of an antigen-binding receptor domain to a cancer antigen and consequent activation of T cells, and a method of screening for CAR activity in a live cell by using the FRET-based biosensor.

Abstract: The present disclosure relates to an interior material for a vehicle and a method for molding the interior material for the vehicle, and more specifically the method for molding an interior material for a vehicle according to the present disclosure includes heating a skin inserted into an upper end heater and a lower end heater spaced apart from each other; preforming the heated skin using an upper mold having a mold temperature set to have a set shape and a lower mold having a second mold temperature; and pressing the preformed skin and a core using a 1-1 mold and a 1-2 mold having set mold temperatures.

Abstract: A convolutional neural network (CNN) processing method includes selecting a survival network in a precision convolutional network based on a result of performing a high speed convolution operation between an input and a kernel using a high speed convolutional network, and performing a precision convolution operation between the input and the kernel using the survival network.

Abstract: A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.

Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.

Abstract: A processor-implemented liveness test method includes detecting a face region in a query image, the query image including a test object for a liveness test, determining a liveness test condition to be applied to the test object among at least one liveness test condition for at least one registered user registered in a registration database, determining at least one test region in the query image based on the detected face region and the determined liveness test condition, obtaining feature data of the test object from image data of the determined at least one test region using a neural network-based feature extractor, and determining a result of the liveness test based on the obtained feature data and registered feature data registered in the registration database and corresponding to the determined liveness test condition.

Abstract: A semiconductor device includes an isolation insulating layer disposed over a substrate, a semiconductor fin disposed over the substrate, an upper portion of the semiconductor fin protruding from the isolation insulating layer and a lower portion of the semiconductor fin being embedded in the isolation insulating layer, a gate structure disposed over the upper portion of the semiconductor fin and including a gate dielectric layer and a gate electrode layer, gate sidewall spacers disposed over opposing side faces of the gate structure, and a source/drain epitaxial layer. The upper portion of the semiconductor fin includes a first epitaxial growth enhancement layer made of a semiconductor material different from a remaining part of the semiconductor fin. The first epitaxial growth enhancement layer is in contact with the source/drain epitaxial layer. The gate dielectric layer covers the upper portion of the semiconductor fin including the first epitaxial growth enhancement layer.

Abstract: A semiconductor circuit includes a first pad, a second pad, swapping circuit, and an internal circuit. The internal circuit receives a first external signal and a second external signal, and generates a first internal signal and a second internal signal. Based on master information and swapping information, the swapping circuit couples the internal circuit to one of first and second pads to provide a path through which the first internal signal is output and a path through which the first external signal is received, and couples the internal circuit to the other of the first and second pads to provide a path through which the second internal signal is output and a path through which the second external signal is received.

Abstract: In some aspects, mutant or variant Fc domains are provided that exhibit increased binding to FcRn and increased half-life after administration in vivo. The Fc domain may be comprised in a glycosylated or aglycosylated antibody. Methods for using the mutant or variant Fc domains or polypeptides comprising the mutant or variant Fc domains are also provided.

Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

Abstract: The present invention relates to a high voltage-type redox flow battery comprising: a plurality of modules (1001, 1002, 1003, . . , 100n) which are serially connected; and a battery management system (BMS) for monitoring a state-of-charge (SOC) of each of the plurality of modules (1001, 1002, 1003, ..

Abstract: The method includes forming a first dielectric layer on a substrate, forming a via in the first dielectric layer, sequentially forming a first metal pattern, a first metal oxide pattern, a second metal pattern, and an antireflective pattern on the first dielectric layer, and performing an annealing process to react the first metal oxide pattern and the second metal pattern with each other to form a second metal oxide pattern. The forming the second metal oxide pattern includes forming the second metal oxide pattern by a reaction between a metal element of the second metal pattern and an oxygen element of the first metal oxide pattern.

Abstract: An actuating and sensing module is disclosed and includes a bottom plate, a gas pressure sensor, a thin gas transportation device and a cover plate. The bottom plate includes a pressure relief orifice, a discharging orifice and a communication orifice. The gas pressure sensor is disposed on the bottom plate and seals the communication orifice. The thin gas transportation device is disposed on the bottom plate and seals the pressure relief orifice and the discharging orifice. The cover plate is disposed on the bottom plate and covers the gas pressure sensor and the thin gas-transportation device. The cover plate includes an intake orifice. The thin gas transportation device is driven to inhale gas through the intake orifice, the gas is then discharged through the discharging orifice by the thin gas transportation device, and a pressure change of the gas is sensed by the gas pressure sensor.