Abstract: The present disclosure relates to a memory module for authentication to be installed on a recycle cartridge, the memory module comprising: a Ferroelectrics Random Access Memory (FRAM); and a controller electrically connected to the FRAM and configured to communicate with an imaging device such that cartridge authentication is conducted in the imaging device, and to perform information reading and information writing operations.

Abstract: The present disclosure relates to a memory module for authentication to be installed on a recycle cartridge capable of initializing, the memory module comprising: a Ferroelectrics Random Access Memory (FRAM); and a controller electrically connected to the FRAM and configured to communicate with an initialization module to perform an initialization authentication algorithm together with the initialization module, thereby initializing the FRAM when the initialization authentication is completed. According to the present disclosure, the memory module for authentication to be installed on an recycle cartridge where a single unit FRAM is mounted has an effect of the capability of initializing the FRAM and thus reusing the FRAM.

Abstract: In a flash memory, non-selected bit lines prohibited from being programmed are first charged to a predetermined level and then a pumping voltage is generated, the precharging operation to all the bit lines is completed so that a peak current due to a voltage charging concentration is suppressed or decentralized, the memory cell array is divided into two or more portions, and the bit lines are precharged; the flash memory includes a memory cell array having pages that each include memory cells and bit lines and source lines, a first circuit for charging non-selected bit lines among the bit lines to a first voltage level at a first time, a second circuit for generating a pumping voltage higher than a power supply voltage at a second time, and a third circuit for charging the bit lines to a second voltage level at a third time.

Abstract: In a flash memory, non-selected bit lines prohibited from being programmed are first charged to a predetermined level and then a pumping voltage is generated, the precharging operation to all the bit lines is completed so that a peak current due to a voltage charging concentration is suppressed or decentralized, the memory cell array is divided into two or more portions, and the bit lines are precharged; the flash memory includes a memory cell array having pages that each include memory cells and bit lines and source lines, a first circuit for charging non-selected bit lines among the bit lines to a first voltage level at a first time, a second circuit for generating a pumping voltage higher than a power supply voltage at a second time, and a third circuit for charging the bit lines to a second voltage level at a third time.