Patents by Inventor Chang-Lin Wei

Chang-Lin Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11879934
    Abstract: A test kit for testing a device under test (DUT) includes a socket structure for containing the DUT, and a plunger assembly detachably coupled with the socket structure. The plunger assembly includes a multi-layered structure having at least an interposer substrate sandwiched by a top socket and a nest.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: January 23, 2024
    Assignee: MEDIATEK INC.
    Inventors: Jing-Hui Zhuang, Ying-Chou Shih, Sheng-Wei Lei, Chang-Lin Wei, Chih-Yang Liu, Che-Hsien Huang, Yi-Chieh Lin
  • Publication number: 20230236222
    Abstract: This disclosure provides a test kit for testing a device under test (DUT) including a socket structure for containing the DUT, and a plunger assembly detachably coupled with the socket structure. The plunger assembly includes a multi-layered structure having a nest and an interposer substrate installed under the nest.
    Type: Application
    Filed: March 30, 2023
    Publication date: July 27, 2023
    Applicant: MEDIATEK INC.
    Inventors: Jing-Hui Zhuang, Ying-Chou Shih, Sheng-Wei Lei, Chang-Lin Wei, Che-Hsien Huang, Shih-Chia Chiu, Yi-Chieh Lin, Wun-Jian Lin
  • Patent number: 11624758
    Abstract: A test kit for testing a device under test (DUT) includes a socket structure for containing the DUT. The DUT includes an antenna and radiates a RF signal. The test kit further includes a reflector having a lower surface. The RF signal emitted from the antenna of the DUT is reflected by the reflector and a reflected RF signal is received by the antenna of the DUT.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: April 11, 2023
    Assignee: MEDIATEK INC.
    Inventors: Sheng-Wei Lei, Chang-Lin Wei, Ying-Chou Shih, Yeh-Chun Kao, Yen-Ju Lu, Po-Sen Tseng
  • Publication number: 20220397600
    Abstract: A test kit for testing a device under test (DUT) includes a socket structure for containing the DUT, and a plunger assembly detachably coupled with the socket structure. The plunger assembly includes a multi-layered structure having at least an interposer substrate sandwiched by a top socket and a nest.
    Type: Application
    Filed: May 3, 2022
    Publication date: December 15, 2022
    Applicant: MEDIATEK INC.
    Inventors: Jing-Hui Zhuang, Ying-Chou Shih, Sheng-Wei Lei, Chang-Lin Wei, Chih-Yang Liu, Che-Hsien Huang, Yi-Chieh Lin
  • Publication number: 20210302467
    Abstract: A test kit for testing a device under test (DUT) includes a socket structure for containing the DUT. The DUT includes an antenna and radiates a RF signal. The test kit further includes a reflector having a lower surface. The RF signal emitted from the antenna of the DUT is reflected by the reflector and a reflected RF signal is received by the antenna of the DUT.
    Type: Application
    Filed: March 24, 2021
    Publication date: September 30, 2021
    Inventors: Sheng-Wei Lei, Chang-Lin Wei, Ying-Chou Shih, Yeh-Chun Kao, Yen-Ju Lu, Po-Sen Tseng
  • Patent number: 8441332
    Abstract: The invention is directed to inter-helix inductor devices. The inter-helix inductor device includes a dielectric substrate. An input end is disposed on the first surface of the dielectric substrate. A clockwise winding coil has one end connecting to the input end and at least one winding turn through the dielectric substrate. A counter clockwise winding coil includes at least one winding turn through the dielectric substrate, wherein the clockwise and counter clockwise winding coils are connected by an interconnection. An output end is disposed on the dielectric substrate, connects one end of the counter clockwise winding coil, and is adjacent to the input end.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 14, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Ting Chen, Chang-Sheng Chen, Chin-Sun Shyu, Chang-Lin Wei
  • Patent number: 8274352
    Abstract: An inductor device comprising a first conductive pattern on a first layer of a substrate, a second conductive pattern on a second layer of the substrate, and a first region between the first layer and the second layer through which at least one hole is coupled between the first dielectric layer and the second dielectric layer, wherein a magnetic field induced by at least one of the first conductive pattern or the second conductive pattern at the first region is more intensive than that induced by at least one of the first conductive pattern or the second conductive pattern at a second region between the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: September 25, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Lin Wei, Kuo-Chiang Chin, Cheng-Hua Tsai, Chin-Sun Shyu, Chang-Sheng Chen
  • Publication number: 20120031654
    Abstract: A dual-port capacitor structure includes a first electrode plate having a first opening; a second electrode plate having a second opening; and a third electrode plate, disposed in the first opening of the first electrode plate and the second opening of the second electrode plate. The first electrode plate, the second electrode plate and the third electrode plate locate on the same plane.
    Type: Application
    Filed: October 21, 2011
    Publication date: February 9, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wei-Ting Chen, Chang-Sheng Chen, Chin-Sun Shyu, Chang-Lin Wei, Cheng-Hua Tsai, Kuo-Chiang Chin
  • Patent number: 8077443
    Abstract: A capacitor structure is provided. In the capacitor structure, a signal electrode plate and an extension ground electrode plate are disposed on the same plane to form a co-plane capacitor structure. Due to slow wave characteristic, the resonance frequency of the capacitor structure is effectively raised and the capacitor structure may be applied in high frequency.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: December 13, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Ting Chen, Chang-Sheng Chen, Chin-Sun Shyu, Chang-Lin Wei, Cheng-Hua Tsai, Kuo-Chiang Chin
  • Patent number: 8018299
    Abstract: A band-pass filter includes a plurality of resonators, a feedback capacitive device and a grounding inductance device. A first end of each resonator is connected to a first node, and a second end of each resonator is connected to a second node. The feedback capacitive device is formed on the feedback circuit from the first node to the second node. The grounding inductance device is connected to the second node and ground. In an embodiment, the resonator essentially consists of a capacitive device and an inductance device.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: September 13, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Kuo Chiang Chin, Chang Lin Wei, Cheng Hua Tsai, Wei Ting Chen, Li Chi Chang, Chang Sheng Chen
  • Patent number: 7994885
    Abstract: A switch module consists of a build-up multi-layer structure and some passive devices. The build-up multi-layer structure has multitudes of conductive layers and dielectric layers laminated upon each another. At least one dielectric layer is interfered between any two conductive layers. Any one passive device is a portion of at least one conductive layer and electrically connects multitudes of conductive pads on the surface of the build-up multi-layer structure.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: August 9, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Lin Wei, Ching-Liang Weng, Uei-Ming Jow, Ying-Jiunn Lai, Syun Yu, Chang-Sheng Chen
  • Publication number: 20110169597
    Abstract: An inductor device comprising a first conductive pattern on a first layer of a substrate, a second conductive pattern on a second layer of the substrate, and a first region between the first layer and the second layer through which at least one hole is coupled between the first dielectric layer and the second dielectric layer, wherein a magnetic field induced by at least one of the first conductive pattern or the second conductive pattern at the first region is more intensive than that induced by at least one of the first conductive pattern or the second conductive pattern at a second region between the first conductive layer and the second conductive layer.
    Type: Application
    Filed: January 19, 2011
    Publication date: July 14, 2011
    Inventors: Chang-Lin Wei, Kuo-Chiang Chin, Cheng-Hua Tsai, Chin-Sun Shyu, Chang-Sheng Chen
  • Patent number: 7948355
    Abstract: An embedded resistor device includes a resistor, a ground plane located near a first side of the resistor and electrically coupled to a first end of the resistor, at the ground plane a hole is provided, a first dielectric layer exists between the resistor and the ground plane, a conductive wire, which is electrically coupled to a second end of the resistor different from the first end of the resistor and partially surrounds the resistor, is used as an auxiliary for supporting a resistor-coating process of the resistor and to provide a terminal of the embedded resistor device at the conductive wire, a conductive region located near a second side of the ground plane different from the first side of the resistor, a second dielectric layer exists between the ground plane and the conductive region, and a conductive path to electrically couple the conductive wire to the conductive region through the hole.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: May 24, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Lin Wei, Chang-Sheng Chen, Cheng-Hua Tsai, Syun Yu, Chin-Sun Shyu
  • Patent number: 7940157
    Abstract: A resistor layout structure and a manufacture method thereof are provided. The resistor layout structure includes a substrate, a plurality of metals, and a plurality of resistor lumps. The plurality of metals is disposed on the substrate. The plurality of first resistor lumps is disposed on the substrate. The metals are used as a supporting structure during the disposing process. Besides, the metals are interlaced and connected in series connected with the resistor lumps to form the resistor. Therefore, the present invention decreases the resistance variability of the resistor.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: May 10, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Ting Chen, Chang-Sheng Chen, Chin-Sun Shyu, Chang-Lin Wei
  • Patent number: 7936243
    Abstract: An adjustable resistor embedded in a multi-layered substrate and method for forming the same. The adjustable resistor comprises: a planar resistor, having a plurality of terminals; and a plurality of connecting lines connected to the planar resistor, each of the connecting lines being drawn from each of the terminals of the planar resistor so as to form a resistor network, wherein the connecting lines are selectively broken by a process for drilling the substrate to form a number of combinations of opened connecting lines such that the resistance value of the adjustable resistor is varied and thus the resistance value of the adjustable resistor can be precisely adjusted.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: May 3, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Ying-Jiunn Lai, Chang-Sheng Chen, Chin-Sun Shyu, Uei-Ming Jow, Chang-Lin Wei
  • Patent number: 7932802
    Abstract: A meander inductor is disclosed, the inductor is disposed on a substrate or embedded therein. The meander inductor includes a conductive layer composed of a plurality of sinusoidal coils with different amplitudes and in series connection to each other, wherein the sinusoidal coils with different amplitudes are laid out according to a periphery outline. The profile of the meander inductor is designed according to an outer frame range available for accommodating the meander inductor and is formed by coils with different amplitudes. Therefore, under a same area condition, the present invention enables the Q factor and the resonant frequency fr of the novel inductor to be advanced, and further expands the applicable range of the inductor.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: April 26, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Lin Wei, Chang-Sheng Chen, Cheng-Hua Tsai, Kuo-Chiang Chin, Chin-Sun Shyu
  • Patent number: 7911318
    Abstract: The present invention relates to an adjustable resistor embedded in a circuit board and a method of fabricating the same. The adjustable resistor comprises a resistor with a number of connection terminals, and a number of via holes extending to contact with the resistor. The resistive value of the resistor is variable depending on the size of the via holes, the number of the via holes, or the distance between the via holes.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: March 22, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chin-Sun Shyu, Chang-Sheng Chen, Chang-Lin Wei, Wei-Ting Chen
  • Publication number: 20110063067
    Abstract: The invention is directed to inter-helix inductor devices. The inter-helix inductor device includes a dielectric substrate. An input end is disposed on the first surface of the dielectric substrate. A clockwise winding coil has one end connecting to the input end and at least one winding turn through the dielectric substrate. A counter clockwise winding coil includes at least one winding turn through the dielectric substrate, wherein the clockwise and counter clockwise winding coils are connected by an interconnection. An output end is disposed on the dielectric substrate, connects one end of the counter clockwise winding coil, and is adjacent to the input end.
    Type: Application
    Filed: November 17, 2010
    Publication date: March 17, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wei-Ting Chen, Chang-Sheng Chen, Chin-Sun Shyu, Chang-Lin Wei
  • Patent number: 7884697
    Abstract: The invention provides tunable embedded high frequency inductor devices. The inductor device comprises a dielectric substrate. A first conductive line is disposed on a first surface of the dielectric substrate. A second conductive line is disposed on a second surface of the dielectric substrate. An interconnection is disposed perforating the dielectric substrate and connecting the first conductive line with the second conductive line. A coupling region is defined between the first and the second conductive lines. A conductive plug connecting the first conductive line and the second line is disposed in the coupling region. Alternatively, an opening is disposed in the first and second conductive lines to tune inductance of the inductor.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: February 8, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Lin Wei, Cheng-Hua Tsai, Chin-Sun Shyu, Kuo-Chiang Chin, Syun Yu
  • Patent number: D1027039
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: May 14, 2024
    Assignee: HTC CORPORATION
    Inventors: Chang-Hua Wei, Pei-Pin Huang, Yu-Lin Huang