Abstract: A method for manufacturing a LiDAR device is proposed. The method may include providing a LiDAR module including a laser emitting module and a laser detecting module to a target region. The method may also include adjusting, on the basis of first detecting data obtained from the laser detecting module, a relative position of a detecting optic module with respect to the laser detecting module. The method may further include adjusting, on the basis of image data obtained from at least one image sensor, a relative position of an emitting optic module with respect to the laser emitting module.

Abstract: An air conditioner for a vehicle including an air-conditioning case divided into a plurality of air passageways by a separation wall. A heating heat exchanger is disposed inside the air-conditioning case and exchanges heat with air to heat the interior of the vehicle. A perforated member is disposed at a downstream side of the heating heat exchanger and has a plurality of perforated holes through which the air passing the heating heat exchanger passes, and a partition wall is disposed between the heating heat exchanger and the perforated member to divide the air passageway of the air-conditioning case into a plurality of air passageways, wherein the partition wall is formed integrally with the perforated member.

Abstract: A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed.

Abstract: A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed.

Abstract: A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed.

Abstract: Disclosed herein is a CMOS image sensor for improving an image quality by removing an offset noise occurred in a path difference. The CMOS image sensor includes a pixel array including a plurality of a first pixel and a second pixel; a first analog data bus and a second analog data bus for transferring a first pixel data and a second pixel data, each generated from the first pixel and the second pixel; a first analog signal processing unit and a second analog signal processing unit, each for amplifying an inputted pixel data to extract a pure pixel data; and a swapping unit for swapping the first pixel data and the second pixel data to thereby delivery each of first and second swapped pixel data into each of the first and the second analog signal processing unit.

Abstract: An image sensor of the present invention prevents the phenomenon that surrounding background of a bright object reflecting or emitting strong light like the sun is presented at dark and improves image quality of the image sensor by controlling the brightness of the bright object. The image sensor using correlated double sampling technology which outputs data of an object by using difference between a reset voltage signal and a data voltage signal of a unit pixel includes a plurality of unit pixels arranged in a matrix, each outputting the reset voltage signal and the data voltage signal; a plurality of clamping means, each coupled to each unit pixels for clamping up the reset signal to a predetermined voltage level; and a voltage controlling block for adjusting voltage level supplied to a gate of each of clamping means.

Abstract: A CMOS image sensor according to an embodiment of the present invention includes a unit pixel, including a transfer transistor controlled by a transfer control signal; and a transfer control signal controller for controlling a rising and a falling times of the transfer control signal, wherein the falling time of the transfer control signal is sufficiently increased to reduce a partition noise.

Abstract: Disclosed herein is a CMOS image sensor for improving an image quality by removing an offset noise occurred in a path difference. The CMOS image sensor includes a pixel array including a plurality of a first pixel and a second pixel; a first analog data bus and a second analog data bus for transferring a first pixel data and a second pixel data, each generated from the first pixel and the second pixel; a first analog signal processing unit and a second analog signal processing unit, each for amplifying an inputted pixel data to extract a pure pixel data; and a swapping unit for swapping the first pixel data and the second pixel data to thereby delivery each of first and second swapped pixel data into each of the first and the second analog signal processing unit.

Abstract: A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed.

Abstract: A CMOS image sensor is provided. In the CMOS image sensor, a pixel array has a plurality of first color pixels, a plurality of second color pixels and a plurality of third color pixels, which are arranged in matrix form. A CDS (correlated double sampling) part has CDS circuits to receive output signals of the pixels, one CDS circuit per column being provided. A plurality of analog data buses receive divided output signal of the CDS circuits. An ASP (analog signal processor) is connected to the plurality of analog data buses.

Abstract: A CMOS image sensor includes: a pixel array having a plurality of first pixels, a plurality of second pixels and a plurality of third pixels that are arranged in matrix form and respectively correspond to a first color, a second color and a third color. A first analog signal processing path is arranged in one side of the pixel array to process analog signals outputted from the first pixels, and a second analog signal processing path is arranged in the other side of the pixel array to process analog signals outputted from the second pixels or the third pixels. The first analog signal processing path includes a lower CDS part where one CDS circuit per two adjacent columns of the pixel array is provided. The second analog signal processing path includes an upper CDS part where one CDS circuit per two adjacent columns of the pixel array is provided.

Abstract: Digital-to-analog converters are disclosed that include a complementary metal-oxide semiconductor (CMOS) image sensor, which can control the brightness of a stored image delicately. The digital-to-analog converter includes: an array of resistors with weights on their resistance value, to distribute a voltage delicately and develop a plurality of analog signals; a switching circuit to select and output one of the analog signals of the arrayed resistors in response to a digital control code; and an output circuit to buffer and develop the output of the switching circuit.

Abstract: A switched-capacitor integrator eliminates noise caused by the switching of an input signal. For this purpose, the integrator includes a switched-capacitor unit for providing a capacitor with one of a first and a second input voltage in response to clock signals, a reference voltage providing unit for receiving a reference voltage and outputting an amplified reference voltage, a switching noise eliminating unit for maintaining an output of the reference voltage providing unit at a stabilized voltage level, an operational amplifying unit for receiving an output of the switched-capacitor unit as its negative input and the output of the reference voltage providing unit passed through the switching noise eliminating unit as its positive input and a feedback capacitor for feeding back an output of the operational amplifying unit to the negative input.

Abstract: Digital-to-analog converters are disclosed that include a complementary metal-oxide semiconductor (CMOS) image sensor, which can control the brightness of a stored image delicately. The digital-to-analog converter includes: an array of resistors with weights on their resistance value, to distribute a voltage delicately and develop a plurality of analog signals; a switching circuit to select and output one of the analog signals of the arrayed resistors in response to a digital control code; and an output circuit to buffer and develop the output of the switching circuit.

Abstract: A switched-capacitor integrator eliminates noise caused by the switching of an input signal. For this purpose, the integrator includes a switched-capacitor unit for providing a capacitor with one of a first and a second input voltage in response to clock signals, a reference voltage providing unit for receiving a reference voltage and outputting an amplified reference voltage, a switching noise eliminating unit for maintaining an output of the reference voltage providing unit at a stabilized voltage level, an operational amplifying unit for receiving an output of the switched-capacitor unit as its negative input and the output of the reference voltage providing unit passed through the switching noise eliminating unit as its positive input and a feedback capacitor for feeding back an output of the operational amplifying unit to the negative input.

Abstract: A CMOS logic gate for a semiconductor apparatus having a buried channel NMOS transistor and a fabrication method of the same are disclosed. The CMOS logic gate according to the present invention includes a pull up unit gate-connected by an input voltage and pulling up an output voltage, a buried channel NMOS transistor connected with the pull up unit and gate-connected by a power voltage, and a surface channel NMOS transistor connected with the buried channel NMOS transistor and gate-connected by the input voltage for pulling down the output voltage for thereby enhancing a reliability of the CMOS logic gate.