Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.

Abstract: “Hybrid” transmission line circuits employing multiple interconnect levels for the propagation, or return, of a single signal line across a package length are described. In package transmission line circuit embodiments, a signal line employs co-located traces in two different interconnect levels that are electrically coupled together. In further embodiments, a reference plane is provided above, below or co-planar with at least one of the co-locate traces. In embodiments, a balanced signal line pair includes first and second co-located traces in two adjacent interconnect levels as a propagation signal line and third and fourth co-located traces in the two adjacent interconnect levels as a return signal line with a ground plane co-planar with, and/or above and/or below the two adjacent interconnect levels.

Abstract: “Hybrid” transmission line circuits employing multiple interconnect levels for the propagation, or return, of a single signal line across a package length are described. In package transmission line circuit embodiments, a signal line employs co-located traces in two different interconnect levels that are electrically coupled together. In further embodiments, a reference plane is provided above, below or co-planar with at least one of the co-locate traces. In embodiments, a balanced signal line pair includes first and second co-located traces in two adjacent interconnect levels as a propagation signal line and third and fourth co-located traces in the two adjacent interconnect levels as a return signal line with a ground plane co-planar with, and/or above and/or below the two adjacent interconnect levels.

Abstract: “Hybrid” transmission line circuits employing multiple interconnect levels for the propagation, or return, of a single signal line across a package length are described. In package transmission line circuit embodiments, a signal line employs co-located traces in two different interconnect levels that are electrically coupled together. In further embodiments, a reference plane is provided above, below or co-planar with at least one of the co-locate traces. In embodiments, a balanced signal line pair includes first and second co-located traces in two adjacent interconnect levels as a propagation signal line and third and fourth co-located traces in the two adjacent interconnect levels as a return signal line with a ground plane co-planar with, and/or above and/or below the two adjacent interconnect levels.

Abstract: Examples are disclosed for outphasing power combining by antenna. In some examples, a device such as a wireless device may route a first signal to a first branch of an outphasing power amplifier system and route a second signal to a second outphasing power amplifier system. The outputs of the first branch and the second branch may be directly coupled to an antenna. The antenna may be arranged to operate as a power combiner for signals outputted from the first and the second branches of the outphasing power amplifier system. A power combined signal may then be transmitted from the antenna. Other examples are described and claimed.

Abstract: Disclosed is an apparatus including a transmitter amplifier having an output terminal communicatively coupled to a transmission line to output a first set of radio frequency (RF) signals to an antenna. The apparatus may include a receiver amplifier having an input terminal communicatively coupled to the transmission line to receive a second set of RF signals from the antenna. The apparatus may include a passive network coupled between the transmitter amplifier and the receiver amplifier, the passive network being configurable to cancel either a first reactance of a parasitic capacitance of the transmitter amplifier or second reactance of a parasitic capacitance of the receiver amplifier. The apparatus may also include a switch coupled between the input terminal and a voltage reference to selectively configure the passive network to cancel either the first reactance or the second reactance. Other embodiments may be described and claimed.

Abstract: “Hybrid” transmission line circuits employing multiple interconnect levels for the propagation, or return, of a single signal line across a package length are described. In package transmission line circuit embodiments, a signal line employs co-located traces in two different interconnect levels that are electrically coupled together. In further embodiments, a reference plane is provided above, below or co-planar with at least one of the co-locate traces. In embodiments, a balanced signal line pair includes first and second co-located traces in two adjacent interconnect levels as a propagation signal line and third and fourth co-located traces in the two adjacent interconnect levels as a return signal line with a ground plane co-planar with, and/or above and/or below the two adjacent interconnect levels.

Abstract: Examples are disclosed for outphasing power combining by antenna. In some examples, a device such as a wireless device may route a first signal to a first branch of an outphasing power amplifier system and route a second signal to a second outphasing power amplifier system. The outputs of the first branch and the second branch may be directly coupled to an antenna. The antenna may be arranged to operate as a power combiner for signals outputted from the first and the second branches of the outphasing power amplifier system. A power combined signal may then be transmitted from the antenna. Other examples are described and claimed.

Abstract: A wireless device includes high-performance CMOS RF switches that include serially connected transistors coupled between an input terminal and an output terminal, with an inductor coupled from the input to the output that resonates out the capacitance of the transistors to improve isolation. The transistors have a floating/bootstrapped body with remote body contacts.

Abstract: A dual reactive shunt feedback low noise amplifier design may include a transconductance amplifier having a capacitor coupled across it and a pair of coupled inductors coupled across it. In one embodiment, the coupled inductors may be laid out as two overlapping coils.

Abstract: A metal oxide semiconductor radio frequency transmit/receive switch may enable lower costs and smaller size. The switch uses an inductor and a capacitor circuit to isolate the power amplifier from the low noise amplifier. Metal oxide semiconductor switches are utilized to switch between transmit and receive modes.

Abstract: A dual reactive shunt feedback low noise amplifier design may include a transconductance amplifier having a capacitor coupled across it and a pair of coupled inductors coupled across it. In one embodiment, the coupled inductors may be laid out as two overlapping coils.

Abstract: A wireless device includes high-performance CMOS RF switches that include serially connected transistors coupled between an input terminal and an output terminal, with an inductor coupled from the input to the output that resonates out the capacitance of the transistors to improve isolation. The transistors have a floating/bootstrapped body with remote body contacts.

Abstract: This invention relates to a low noise amplifier, used in radio frequency integrated circuit design, especially low noise amplifiers for ultra broad-band wireless communication, comprising at least a transistor of the core circuit of a low noise amplifier structure, a transformer that is implemented on the chip, in order to form a dual feedback amplifier, that is, an amplifier structure comprising an inductive feedback and a capacitive feedback, wherein the capacitive feedback is used for the low and medium frequency range, while the inductive feedback is used for the high frequency range. By assembling an amplifier circuit with these two feedback paths, it is possible to provide a broadband and good impedance matching at the signal input end of the circuit.

Abstract: This invention relates to a low noise amplifier, used in radio frequency integrated circuit design, especially low noise amplifiers for ultra broad-band wireless communication, comprising at least a transistor of the core circuit of a low noise amplifier structure, a transformer that is implemented on the chip, in order to form a dual feedback amplifier, that is, an amplifier structure comprising an inductive feedback and a capacitive feedback, wherein the capacitive feedback is used for the low and medium frequency range, while the inductive feedback is used for the high frequency range. By assembling an amplifier circuit with these two feedback paths, it is possible to provide a broadband and good impedance matching at the signal input end of the circuit.