Abstract: A device includes a semiconductor substrate, a channel layer, a gate structure, source/drain epitaxial structures, and a dielectric isolation layer. The channel layer is over the semiconductor substrate. The gate structure is over the semiconductor substrate and surrounds the channel layer. The source/drain epitaxial structures are connected to the channel layer and arranged in a first direction. The dielectric isolation layer is between the gate structure and the semiconductor substrate. The dielectric isolation layer is wider than the gate structure but narrower than the channel layer in the first direction.

Abstract: A method for manufacturing a nanosheet semiconductor device includes: forming a liner layer to cover first and second fin structures, each of the fin structures including a stacked structure, a poly gate disposed on the stacked structure, and inner spacers, the stacked structure including sacrificial features covered by the inner spacers, and channel features disposed to alternate with the sacrificial features; forming a dielectric layer to cover the liner layer, the dielectric layer including an upper portion, a lower portion, and an interconnecting portion that interconnects the upper and lower portions and that laterally covers the liner layer; subjecting the upper and lower portions to a directional treatment; and removing the upper and interconnecting portions of the dielectric layer and a portion of the liner layer, to form a liner and a bottom dielectric insulator disposed on the liner.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a spacer layer along a first fin structure and a second fin structure, etching a first portion of the spacer layer and the first fin structure to form first fin spacers and a first recess between the first fin spacers, etching a second portion of the spacer layer and the second fin structure to form second fin spacers and a second recess between the second fin spacers, and forming a first source/drain feature in the first recess and a second source/drain feature in the second recess. The second fin structure is wider than the first fin structure. The first fin spacers have a first height, and the second fin spacers have a second height that is greater than the first height.

Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.

Abstract: The present disclosure provides a sensing circuit, including a photo-sensing component, a first transistor, and a temperature-sensing component. The photo-sensing component is configured to receive a light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control circuit. The photo-sensing component and the first transistor are coupled in series between first and second nodes. The temperature-sensing component is coupled between the first and second nodes and is configured to generate a second current according to a temperature. The temperature-sensing component includes a channel structure, a first gate, a second gate, and a light-shielding structure. The channel structure is configured to transmit the second current.

Abstract: The present disclosure provides an electronic device including a first sensing circuit, a second sensing circuit and a power line. The first sensing circuit includes a first sensing unit and a first transistor, and a first end of the first sensing unit is coupled to a control end of the first transistor. The second sensing circuit includes a second sensing unit and a second transistor, and a first end of the second sensing unit is coupled to a control end of the second transistor. A first end of the first transistor and a first end of the second transistor are coupled to the power line.

Abstract: The present disclosure provides a sensing circuit, including a photo-sensing component, a first transistor, and a temperature-sensing component. The photo-sensing component is configured to receive a light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control circuit. The photo-sensing component and the first transistor are coupled in series between first and second nodes. The temperature-sensing component is coupled between the first and second nodes and is configured to generate a second current according to a temperature. The temperature-sensing component includes a channel structure, a first gate, a second gate, and a light-shielding structure. The channel structure is configured to transmit the second current.

Abstract: A method for detecting and compensating CNC tools being implemented in an electronic device, receives from a detector first parameters and second parameters in respect of a first tool. Such first parameters include at least one of service life, blade break information, and blade chipping information of the first tool, and such second parameters include at least one of length extension information, length wear information, radial wear information, and blade thickness wear information of the first tool. Based on the first parameters, instructions to process the workpiece are transmitted or not. Upon receiving the second parameters, instructions to adjust operation of the first tool are transmitted, to compensate for deterioration in normal use.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.

Abstract: A battery-operated handheld device including a housing to enclose electrical components and a battery holder. The battery holder including a first battery slot and a second battery slot. The first and second battery slots being sized to hold batteries of different battery sizes. The second battery slot being alongside the first battery slot. The electrical components of the handheld device may be powered by either the first battery inserted into the first battery slot or the second battery inserted into the second battery slot. The battery holder may serve as an adjustable weight distribution mechanism to shift a centre of gravity of the handheld device between a first predetermined centre of gravity associated with the first battery inserted into the first battery slot and a second predetermined centre of gravity associated with the second battery inserted into the second battery slot.

Abstract: A method includes attaching a package component to a package substrate, the package component includes: an interposer disposed over the package substrate; a first die disposed along the interposer; and a second die disposed along the interposer, the second die being laterally adjacent the first die; attaching a first thermal interface material to the first die, the first thermal interface material being composed of a first material; attaching a second thermal interface material to the second die, the second thermal interface material being composed of a second material different from the first material; and attaching a lid assembly to the package substrate, the lid assembly being further attached to the first thermal interface material and the second thermal interface material.

Abstract: The present invention relates to a cholesteric liquid crystal display, a liquid crystal driving unit, and a driving method for reducing the maximum driving voltage. The cholesteric liquid crystal display comprises a cholesteric liquid crystal display panel, a temperature detecting device, and a liquid crystal driving unit. If the temperature detecting device detects a temperature below the optimal range for the cholesteric liquid crystal display panel, the liquid crystal driving unit will operate the cholesteric liquid crystal display panel in DDS timing mode. When the temperature detecting device detects that the temperature of the display panel exceeds the optimal temperature range, the liquid crystal driving unit will operate the display panel in PWM timing mode, which can solve the problem of increased power consumption caused by changes in ambient temperature, and can greatly improve the better color level.

Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.

Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.

Abstract: An antimicrobial medical device that includes a substrate having a metal surface that is made from a metal or metal alloy that may include stainless steel, cobalt, and titanium. Disposed on the metal surface is a first antimicrobial oxide layer that includes an antimicrobial metal that may include silver, copper, and zinc, and combinations thereof. The atoms of antimicrobial metal in the first antimicrobial oxide layer are of a first concentration. The first antimicrobial oxide layer is positioned in a direction opposite that of the metal surface. The device further includes a second antimicrobial oxide layer that includes an antimicrobial metal that may be silver, copper, and zinc, and combinations thereof. The atoms of the antimicrobial metal present in the second antimicrobial oxide layer are of a second concentration. The first concentration and the second concentration are not equal. Methods for making the antimicrobial medical device are also disclosed.

Abstract: A structure includes a controlled polyimide profile. A method for forming such a structure includes depositing, on a substrate, a photoresist containing polyimide and performing a first anneal at a first temperature. The method further includes exposing the photoresist to a radiation source through a photomask having a pattern associated with a shape of a polyimide opening. The method further includes performing a second anneal at a second temperature and removing a portion of the photoresist to form the polyimide opening. The method further includes performing a third anneal at a third temperature and cleaning the polyimide opening by ashing.

Abstract: A structure includes a controlled polyimide profile. A method for forming such a structure includes depositing, on a substrate, a photoresist containing polyimide and performing a first anneal at a first temperature. The method further includes exposing the photoresist to a radiation source through a photomask having a pattern associated with a shape of a polyimide opening. The method further includes performing a second anneal at a second temperature and removing a portion of the photoresist to form the polyimide opening. The method further includes performing a third anneal at a third temperature and cleaning the polyimide opening by ashing.

Abstract: An antimicrobial medical device that includes a substrate having a metal surface that is made from a metal or metal alloy that may include stainless steel, cobalt, and titanium. Disposed on the metal surface is a first antimicrobial oxide layer that includes an antimicrobial metal that may include silver, copper, and zinc, and combinations thereof. The atoms of antimicrobial metal in the first antimicrobial oxide layer are of a first concentration. The first antimicrobial oxide layer is positioned in a direction opposite that of the metal surface. The device further includes a second antimicrobial oxide layer that includes an antimicrobial metal that may be silver, copper, and zinc, and combinations thereof. The atoms of the antimicrobial metal present in the second antimicrobial oxide layer are of a second concentration. The first concentration and the second concentration are not equal. Methods for making the antimicrobial medical device are also disclosed.

Abstract: A light source module and a method for manufacturing the same, and a backlight module and a display device using the same are provided. The method includes the following steps. A reference light source module is provided. The reference light source module comprises a substrate and plural light-emitting units arranged on the substrate. Then, plural optical trends between every two adjacent light-emitting units are obtained. Then, plural optical ratios between every two adjacent light-emitting units are calculated, in which each of the optical ratios is a ratio of each of the optical trends to a total reference optical trend of the reference light source module. Then, plural target distances are calculated according to the optical ratios and plural initial distances between every two adjacent light-emitting units are adjusted according to the target distances, thereby forming a target light source module.

Abstract: The present disclosure describes a structure with a controlled polyimide profile and a method for forming such a structure. The method includes depositing, on a substrate, a photoresist containing polyimide and performing a first anneal at a first temperature. The method further includes exposing the photoresist to a radiation source through a photomask having a pattern associated with a shape of a polyimide opening. The method further includes performing a second anneal at a second temperature and removing a portion of the photoresist to form the polyimide opening. The method further includes performing a third anneal at a third temperature and cleaning the polyimide opening by ashing.