Patents by Inventor Chang-Yueh Chan

Chang-Yueh Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9254994
    Abstract: A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: February 9, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke
  • Patent number: 9130064
    Abstract: A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier s greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: September 8, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chih-Ming Huang, Chun-Yuan Li, Chih-Hsin Lai
  • Publication number: 20150102433
    Abstract: A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.
    Type: Application
    Filed: September 16, 2014
    Publication date: April 16, 2015
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke
  • Patent number: 8866236
    Abstract: A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: October 21, 2014
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke
  • Patent number: 8716070
    Abstract: A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 6, 2014
    Assignee: Siliconware Precision Industries Co. Ltd.
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke
  • Publication number: 20140080264
    Abstract: A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier s greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.
    Type: Application
    Filed: November 21, 2013
    Publication date: March 20, 2014
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Chang-Yueh Chan, Chih-Ming Huang, Chun-Yuan Li, Chih-Hsin Lai
  • Patent number: 8653661
    Abstract: A package structure having an MEMS element is provided, which includes: a protection layer having openings formed therein; conductors formed in the openings, respectively; conductive pads formed on the protection layer and the conductors; a MEMS chip disposed on the conductive pads; and an encapsulant formed on the protection layer for encapsulating the MEMS chip. By disposing the MEMS chip directly on the protection layer to dispense with the need for a carrier, such as a wafer or a circuit board that would undesirably add to the thickness, the present invention reduces the overall thickness of the package to thereby achieve miniaturization.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: February 18, 2014
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chien-Ping Huang, Chun-Chi Ke, Shih-Kuang Chiu
  • Patent number: 8618641
    Abstract: A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier is greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: December 31, 2013
    Assignee: Siliconware Precision Industries Co., Ltd
    Inventors: Chang-Yueh Chan, Chih-Ming Huang, Chun-Yuan Li, Chih-Hsin Lai
  • Patent number: 8564115
    Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: October 22, 2013
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chien-Ping Huang, Chun-Chi Ke, Chun-An Huang, Chih-Ming Huang
  • Patent number: 8471284
    Abstract: An LED package structure includes: a carrier; at least a first protruding portion and a plurality of electrical contacts formed on the carrier; a plurality of LED chips disposed on the first protruding portion and on the carrier in a region free from the first protruding portion, respectively; a plurality of bonding wires electrically connecting the LED chips and the electrical contacts; and a phosphor covering the LED chips, the electrical contacts and the bonding wires. The LED chips are disposed at different heights so as to allow the portions of the phosphor on the LED chips to have different thicknesses and thus generate light with different color temperatures.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: June 25, 2013
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chieh-Lung Lai, Chih-Sheng Hsu, Chang-Yueh Chan
  • Patent number: 8420430
    Abstract: A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: April 16, 2013
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke
  • Publication number: 20120286308
    Abstract: An LED package structure and a method of fabricating the same. The LED package structure includes: a package unit including a submount with a cavity, and a light emitting chip disposed in the cavity; a first light-pervious element disposed in the cavity; a multi-layered dam structure concentrically disposed on the first light-pervious element or around a rim of the cavity; a first light-pervious packaging material filled in the dam structure; and a second light-pervious element that combines with the dam structure. Accordingly, the multi-layered dam structure provides an advantage of eliminating gaps and overcomes the problem resulting from the uneven thickness of the first light-pervious packaging material used in the prior technique, thereby ensuring high illumination efficiency and enhanced airtightness.
    Type: Application
    Filed: September 23, 2011
    Publication date: November 15, 2012
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chieh-Lung Lai, Wen-Lin Chang, Chih-Sheng Hsu, Chang-Yueh Chan
  • Publication number: 20120286425
    Abstract: A package structure having an MEMS element is provided, which includes: a protection layer having openings formed therein; conductors formed in the openings, respectively; conductive pads formed on the protection layer and the conductors; a MEMS chip disposed on the conductive pads; and an encapsulant formed on the protection layer for encapsulating the MEMS chip. By disposing the MEMS chip directly on the protection layer to dispense with the need for a carrier, such as a wafer or a circuit board that would undesirably add to the thickness, the present invention reduces the overall thickness of the package to thereby achieve miniaturization.
    Type: Application
    Filed: June 28, 2011
    Publication date: November 15, 2012
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chang-Yueh Chan, Chien-Ping Huang, Chun-Chi Ke, Shih-Kuang Chiu
  • Publication number: 20120241937
    Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.
    Type: Application
    Filed: June 8, 2012
    Publication date: September 27, 2012
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chang-Yueh Chan, Chien-Ping Huang, Chun-Chi Ke, Chun-An Huang, Chih-Ming Huang
  • Publication number: 20120168777
    Abstract: An LED package structure includes: a carrier; at least a first protruding portion and a plurality of electrical contacts formed on the carrier; a plurality of LED chips disposed on the first protruding portion and on the carrier in a region free from the first protruding portion, respectively; a plurality of bonding wires electrically connecting the LED chips and the electrical contacts; and a phosphor covering the LED chips, the electrical contacts and the bonding wires. The LED chips are disposed at different heights so as to allow the portions of the phosphor on the LED chips to have different thicknesses and thus generate light with different color temperatures.
    Type: Application
    Filed: February 7, 2011
    Publication date: July 5, 2012
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chieh-Lung Lai, Chih-Sheng Hsu, Chang-Yueh Chan
  • Patent number: 8198689
    Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: June 12, 2012
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chien-Ping Huang, Chun-Chi Ke, Chun-An Huang, Chih-Ming Huang
  • Publication number: 20120127693
    Abstract: A light-permeating cover board structure includes a first light-permeating board having a light-permeating substrate and a frame formed on the light-permeating substrate, wherein a first recess portion is defined by the frame and the light-permeating substrate; a first fluorescent material filled in the first recess portion; and a second light-permeating board disposed on the first light-permeating board and covering the first fluorescent material in the first recess portion. Therefore, the first light-permeating board and the second light-permeating board prevent the first fluorescent material from contacting moisture.
    Type: Application
    Filed: February 8, 2011
    Publication date: May 24, 2012
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chieh-Lung Lai, Chang-Yueh Chan, Jui-Feng Lai, Chih-Sheng Hsu
  • Patent number: 8154115
    Abstract: A package structure having an MEMS element includes: a chip having at least an MEMS element and a plurality of first conductive pads; a lid disposed on the chip to cover the MEMS element and having a plurality of second conductive pads formed thereon; a plurality of bonding wires electrically connecting the first and second conductive pads; a plurality of first bumps disposed on the second conductive pads, respectively; an encapsulant formed on the chip to encapsulate the lid, the bonding wires, the first and second conductive pads and the first bumps while exposing the top surfaces of the first bumps; and a plurality of circuits formed on the encapsulant and electrically connecting to the exposed first bumps, thereby avoiding the conventional drawback of electrical connection failure caused by position deviation of bonding wires due to mold flow of the encapsulant.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: April 10, 2012
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chien-Ping Huang, Chun-Chi Ke, Shih-Kuang Chiu
  • Publication number: 20110177643
    Abstract: A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.
    Type: Application
    Filed: April 28, 2010
    Publication date: July 21, 2011
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke
  • Publication number: 20110175179
    Abstract: A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.
    Type: Application
    Filed: April 29, 2010
    Publication date: July 21, 2011
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Hsin Chiu, Chih-Ming Huang, Chang-Yueh Chan, Hsin-Yi Liao, Chun-Chi Ke