Patents by Inventor Chang-Cheng Lo

Chang-Cheng Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11860404
    Abstract: A manufacturing method of a reflective display includes at least the following steps. A reflective display module having a display surface is provided. An adhesive is formed on the display surface of the reflective display module. A plurality of microstructures is formed on the adhesive. A cover plate is provided over the reflective display module, the microstructures, and the adhesive. The cover plate has a first surface, a second surface, and a third surface. The second surface is located between the first surface and the reflective display module, and the third surface is connected to the first surface and the second surface. The second surface of the cover plate is adhered to the adhesive having the microstructures thereon to bond the microstructures onto the second surface of the cover plate. A light source is disposed adjacent to the third surface of the cover plate.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: January 2, 2024
    Assignee: E Ink Holdings Inc.
    Inventors: Chang-Cheng Lo, Yue-Feng Lin
  • Publication number: 20230215995
    Abstract: A manufacturing method of a reflective display includes at least the following steps. A reflective display module having a display surface is provided. An adhesive is formed on the display surface of the reflective display module. A plurality of microstructures is formed on the adhesive. A cover plate is provided over the reflective display module, the microstructures, and the adhesive. The cover plate has a first surface, a second surface, and a third surface. The second surface is located between the first surface and the reflective display module, and the third surface is connected to the first surface and the second surface. The second surface of the cover plate is adhered to the adhesive having the microstructures thereon to bond the microstructures onto the second surface of the cover plate. A light source is disposed adjacent to the third surface of the cover plate.
    Type: Application
    Filed: March 10, 2023
    Publication date: July 6, 2023
    Applicant: E Ink Holdings Inc.
    Inventors: Chang-Cheng Lo, Yue-Feng Lin
  • Patent number: 11640094
    Abstract: A display device includes a thin film transistor (TFT) array substrate, an isolation structure, and a front panel laminate (FPL) structure. The TFT array substrate has pixel electrodes. The isolation structure is between the pixel electrodes to form a first resistance between adjacent pixel electrodes. The front panel laminate structure is located on the isolation structure and the pixel electrodes adhesive layer, and has a display medium layer therein.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: May 2, 2023
    Assignee: E Ink Holdings Inc.
    Inventors: Chang-Cheng Lo, Shi-Lin Li, Ji-Yuan Li, Yi-Lung Wen
  • Patent number: 11373983
    Abstract: A novel 3D package configuration is provided by stacking a plurality of semiconductor package units or a folded flexible circuit board structure on a lead frame and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: June 28, 2022
    Assignee: CCS Technology Corporation
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Publication number: 20220199498
    Abstract: A novel 3D package configuration is provided by stacking a folded flexible circuit board structure on a package substrate and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 23, 2022
    Applicant: CCS Technology Corporation
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Publication number: 20220199579
    Abstract: A novel 3D package configuration is provided by stacking a plurality of semiconductor package units or a folded flexible circuit board structure on a lead frame and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.
    Type: Application
    Filed: January 26, 2021
    Publication date: June 23, 2022
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Publication number: 20220199497
    Abstract: A novel 3D package configuration is provided by stacking a folded flexible circuit board structure on a package substrate and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 23, 2022
    Applicant: CCS Technology Corporation
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Publication number: 20220199583
    Abstract: A novel 3D package configuration is provided by stacking a plurality of semiconductor package units or a folded flexible circuit board structure on a package substrate and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 23, 2022
    Applicant: CCS Technology Corporation
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Patent number: 11257695
    Abstract: This invention provides an apparatus for transferring at least one microdevice and a method for transferring at least one microdevice, which is characterized by utilizing the apparatus for transferring at least one microdevice having a magnetic attracting substrate with at least one magnetic attracting head or magnetic attracting position hole to attract at least one microdevice having at least one magnetic layer disposed on a temporary substrate, and transfer the at least one microdevice to the conductive bonding layer of the at least one microdevice bonding region on a target substrate thereafter.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: February 22, 2022
    Assignee: CCS TECHNOLOGY CORPORATION
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Publication number: 20220051916
    Abstract: This invention provides an apparatus for transferring at least one microdevice and a method for transferring at least one microdevice, which is characterized by utilizing the apparatus for transferring at least one microdevice having a magnetic attracting substrate with at least one magnetic attracting head or magnetic attracting position hole to attract at least one microdevice having at least one magnetic layer disposed on a temporary substrate, and transfer the at least one microdevice to the conductive bonding layer of the at least one microdevice bonding region on a target substrate thereafter.
    Type: Application
    Filed: November 18, 2020
    Publication date: February 17, 2022
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Publication number: 20210325708
    Abstract: A display device includes a thin film transistor (TFT) array substrate, an isolation structure, and a front panel laminate (FPL) structure. The TFT array substrate has pixel electrodes. The isolation structure is between the pixel electrodes to form a first resistance between adjacent pixel electrodes. The front panel laminate structure is located on the isolation structure and the pixel electrodes adhesive layer, and has a display medium layer therein.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 21, 2021
    Inventors: Chang-Cheng LO, Shi-Lin LI, Ji-Yuan LI, Yi-Lung WEN
  • Patent number: 11099444
    Abstract: A display device includes a thin film transistor (TFT) array substrate, an isolation structure, and a front panel laminate (FPL) structure. The TFT array substrate has pixel electrodes. The isolation structure is between the pixel electrodes to form a first resistance between adjacent pixel electrodes. The front panel laminate structure is located on the isolation structure and the pixel electrodes adhesive layer, and has a display medium layer therein.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: August 24, 2021
    Assignee: E Ink Holdings Inc.
    Inventors: Chang-Cheng Lo, Shi-Lin Li, Ji-Yuan Li, Yi-Lung Wen
  • Publication number: 20210119077
    Abstract: A reflective display includes a reflective display module, a cover plate, a light source, a plurality of microstructures, and an adhesive. The reflective display module has a display surface. The cover plate is overlapped with the reflective display module, and the display surface is located between the cover plate and the reflective display module. The cover plate has a first surface, a second surface, and a third surface. The second surface is located between the first surface and the reflective display module. The third surface is connected to the first surface and the second surface. The light source is disposed beside the third surface. The microstructures are located between the cover plate and the reflective display module. The adhesive is located between the microstructures and the reflective display module. The reflective display module is bonded to the second surface via the adhesive.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 22, 2021
    Applicant: E Ink Holdings Inc.
    Inventors: Chang-Cheng Lo, Yue-Feng Lin
  • Publication number: 20200363669
    Abstract: A display device includes a thin film transistor (TFT) array substrate, an isolation structure, and a front panel laminate (FPL) structure. The TFT array substrate has pixel electrodes. The isolation structure is between the pixel electrodes to form a first resistance between adjacent pixel electrodes. The front panel laminate structure is located on the isolation structure and the pixel electrodes adhesive layer, and has a display medium layer therein.
    Type: Application
    Filed: May 4, 2020
    Publication date: November 19, 2020
    Inventors: Chang-Cheng LO, Shi-Lin LI, Ji-Yuan LI, Yi-Lung WEN
  • Patent number: 8184219
    Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: May 22, 2012
    Assignee: AU Optronics Corporation
    Inventors: Fang-Chen Luo, Chang-Cheng Lo
  • Patent number: 7884914
    Abstract: A structure for encapsulating a liquid crystal display device is disclosed. Openings are formed in a second material layer on a first substrate, exposing an underlying first material layer. The openings are substantially distributed over the perimeter of the first substrate. A sealant is placed in the openings, forming a sealant region for attachment of a second substrate to the first substrate. The sealant region is substantially perpendicular to a direction of length of the openings. In addition, the sealant contacts the first material layer and the second material layer through the openings.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: February 8, 2011
    Assignee: AU Optronics Corp.
    Inventors: Kun-Hong Chen, Chang-Cheng Lo, Tzu-Wei Ho
  • Patent number: 7675582
    Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: March 9, 2010
    Assignee: AU Optronics Corporation
    Inventors: Fang-Chen Luo, Chang-Cheng Lo
  • Patent number: 7612837
    Abstract: A protecting structure for ESD is formed on a substrate of a TFT-LCD. A display area of the TFT-LCD is formed by a pixel array comprising lots of pixel units, scan lines and data lines. The protecting structure comprises a first rake metal and an ?-Si layer. The first rake metal is formed outside the display area and each short end of the first rake metal faces the data line by a spacing. Further, all tips of the short end and the data lines are sharp in shape so as to accumulate electrostatic charges. The ?-Si layer is formed directly under the predetermined short end of first rake metal and the corresponding data line. The ?-Si layer is used to serve as a discharging path for performing through breakdown to the ?-Si layer so as to eliminate electrostatic charges.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: November 3, 2009
    Assignee: Au Optronics Corp.
    Inventors: Chang-Cheng Lo, Hong-Jye Hong
  • Publication number: 20080239183
    Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 2, 2008
    Inventors: Fang-Chen Luo, Chang-Cheng Lo
  • Publication number: 20070058098
    Abstract: A protecting structure for ESD is formed on a substrate of a TFT-LCD. A display area of the TFT-LCD is formed by a pixel array comprising lots of pixel units, scan lines and data lines. The protecting structure comprises a first rake metal and an ?-Si layer. The first rake metal is formed outside the display area and each short end of the first rake metal faces the data line by a spacing. Further, all tips of the short end and the data lines are sharp in shape so as to accumulate electrostatic charges. The ?-Si layer is formed directly under the predetermined short end of first rake metal and the corresponding data line. The ?-Si layer is used to serve as a discharging path for performing through breakdown to the ?-Si layer so as to eliminate electrostatic charges.
    Type: Application
    Filed: November 15, 2006
    Publication date: March 15, 2007
    Inventors: Chang-Cheng Lo, Hong-Jye Hong