Patents by Inventor Changmook YIM

Changmook YIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electronic device for manufacturing semiconductor device and operating method of electronic device
    Patent number: 11900043
    Abstract: Disclosed is an operating method of an electronic device which includes receiving a design layout for manufacturing the semiconductor device, generating a first layout by performing machine learning-based process proximity correction (PPC), generating a second layout by performing optical proximity correction (OPC), and outputting the second layout for a semiconductor process. The generating of the first layout includes generating a first after cleaning inspection (ACI) layout by executing a machine learning-based process proximity correction module on the design layout, generating a second after cleaning inspection layout by adjusting the design layout based on a difference of the first after cleaning inspection layout and the design layout and executing the process proximity correction module on the adjusted layout, and outputting the adjusted layout as the first layout, when a difference between the second after cleaning inspection layout and the design layout is smaller than or equal to a threshold value.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: February 13, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sooyong Lee, Dongho Kim, Sangwook Kim, Jungmin Kim, Seunghune Yang, Jeeyong Lee, Changmook Yim, Yangwoo Heo
  • ELECTRONIC DEVICE FOR MANUFACTURING SEMICONDUCTOR DEVICE AND OPERATING METHOD OF ELECTRONIC DEVICE
    Publication number: 20230028712
    Abstract: Disclosed is an operating method of an electronic device which includes receiving a design layout for manufacturing the semiconductor device, generating a first layout by performing machine learning-based process proximity correction (PPC), generating a second layout by performing optical proximity correction (OPC), and outputting the second layout for a semiconductor process. The generating of the first layout includes generating a first after cleaning inspection (ACI) layout by executing a machine learning-based process proximity correction module on the design layout, generating a second after cleaning inspection layout by adjusting the design layout based on a difference of the first after cleaning inspection layout and the design layout and executing the process proximity correction module on the adjusted layout, and outputting the adjusted layout as the first layout, when a difference between the second after cleaning inspection layout and the design layout is smaller than or equal to a threshold value.
    Type: Application
    Filed: March 22, 2022
    Publication date: January 26, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sooyong LEE, Dongho KIM, Sangwook KIM, Jungmin KIM, Seunghune YANG, Jeeyong LEE, Changmook YIM, Yangwoo HEO