Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.

Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.

Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.

Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: A nanoparticle separating apparatus that can separate nanoparticles from impurities in a nanoparticle dispersion, and a nanoparticle separating method using the same are disclosed. The nanoparticle separating apparatus according to an exemplary embodiment of the present invention includes: a body portion having an inlet hole into which a dispersion flows formed in one side thereof, an outlet hole through which the waste solution from which nanoparticles are separated flows formed in the other side, and a hollow channel formed between the inlet hole o and the outlet hole; a first electrode and a second electrode, each having a porous structure where a plurality of pores are formed, and at least one pair of the first and second electrodes being provided in the channel; and a power supply applying voltages, each having a different polarity, to the first electrode or to the second electrode.

Abstract: A nanoparticle separating apparatus that can separate nanoparticles from impurities in a nanoparticle dispersion, and a nanoparticle separating method using the same are disclosed. A nanoparticle separating apparatus according to an exemplary embodiment of the present invention includes: a body portion having an inlet hole into which a dispersion flows formed in one side thereof, an outlet hole through which the waste solution from which nanoparticles are separated flows formed in the other side, and a hollow channel formed between the inlet hole and the outlet hole; a first electrode and a second electrode, each having a porous structure where a plurality of pores are formed, and at least one pair of the first and second electrodes being provided in the channel; and a power supply applying voltages, each having a different polarity, to the first electrode or to the second electrode.