Patents by Inventor Changwon D. Rhee

Changwon D. Rhee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11150943
    Abstract: Independent workloads may be grouped together into a single super workload. This super workload is dispatched to a single context hardware system that does not run an operating system. This effectively creates a multi-context system out of a single context hardware processor.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: October 19, 2021
    Assignee: Intel Corporation
    Inventors: Changwon D. Rhee, Zhijun R. Lei, Ping Liu, Kin-Hang W. Cheung, Gomathi Ramamurthy, Naiqian Lu, Sang-Hee Lee, Wei Xiong, Richard Gui Xie, Saimanohara S. Alapati, Jay M. Patel
  • Patent number: 10602185
    Abstract: Methods, systems and computer program products that may improve the efficiency of the video encoding process. Mode decision processing and bit stream packing may be performed in parallel for various frames in a sequence. This reduces the amount of idle time for both the mode decision processing logic and the bit stream packing logic, improving the overall efficiency of the video encoder.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: March 24, 2020
    Assignee: Intel Corporation
    Inventors: Sang-Hee Lee, Jian James Zhou, Ning Lu, Jason D. Tanner, Changwon D. Rhee, Hong Jiang
  • Patent number: 10257529
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for dividing a frame comprising pixels into a number of macroblocks, each macroblock comprising a number of pixels within four macroblock boundaries. Various embodiments may also include creating at least two regions having a plurality of macroblocks by dividing the frame along macroblock boundaries and generating wave front groups based on the macroblocks in each region, each wave front group from each region comprising one or more macroblocks to process in parallel.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: April 9, 2019
    Assignee: INTEL CORPORATION
    Inventors: Changwon D. Rhee, Kin-Hang Cheung, Sang-Hee Lee, Zhijun Lei, Dmitry E. Ryzhov, Xinglei Zhu
  • Publication number: 20180293097
    Abstract: In some embodiments, independent workloads may be grouped together into a single super workload. This super workload is dispatched to a single context hardware system that does not run an operating system. This effectively creates a multi-context system out of a single context hardware processor.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 11, 2018
    Inventors: Changwon D. Rhee, Zhijun R. Lei, Ping Liu, Kin-Hang W. Cheung, Gomathi Ramamurthy, Naiqian Lu, Sang-Hee Lee, Wei Xiong, Richard Gui Xie, Saimanohara S. Alapati, Jay M. Patel
  • Publication number: 20150382021
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for divide a frame comprising pixels into a number of macroblocks, each macroblock comprising a number of pixels within four macroblock boundaries. Various embodiments may also include creating at least two regions having a plurality of macroblocks by dividing the frame along macroblock boundaries and generating wave front groups based on the macroblocks in each region, each wave front group from each region comprising one or more macroblocks to process in parallel.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 31, 2015
    Inventors: Changwon D. Rhee, Kin-Hang Cheung, Sang-Hee Lee, Zhijun Lei, Dmitry E. Ryzhov, Xinglei Zhu
  • Publication number: 20130266072
    Abstract: Methods, systems and computer program products that may improve the efficiency of the video encoding process. Mode decision processing and bit stream packing may be performed in parallel for various frames in a sequence. This reduces the amount of idle time for both the mode decision processing logic and the bit stream packing logic, improving the overall efficiency of the video encoder.
    Type: Application
    Filed: September 30, 2011
    Publication date: October 10, 2013
    Inventors: Sang-Hee Lee, Jian James Zhou, Ning Lu, Jason D. Tanner, Changwon D. Rhee, Hong Jiang
  • Patent number: 7239999
    Abstract: A method of pitch corrected speed control (PCSC) playback in which a decoder rate controller receives a desired playback speed from a PCSC controller and determines the number of decoded digital audio samples stored in a buffer. The rate controller then determines the required number of execution times of a parametric speech decoder based on the desired playback speed and the number of decoded samples stored in the buffer. The parametric speech decoder is then executed the determined number of times.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: July 3, 2007
    Assignee: Intel Corporation
    Inventor: Changwon D. Rhee
  • Publication number: 20040019491
    Abstract: A method of pitch corrected speed control (PCSC) playback in which a decoder rate controller receives a desired playback speed from a PCSC controller and determines the number of decoded digital audio samples stored in a buffer. The rate controller then determines the required number of execution times of a parametric speech decoder based on the desired playback speed and the number of decoded samples stored in the buffer. The parametric speech decoder is then executed the determined number of times.
    Type: Application
    Filed: July 23, 2002
    Publication date: January 29, 2004
    Inventor: Changwon D. Rhee