Abstract: A buffer circuit and a multiplexer using the buffer are provided. The buffer may selectively operate at a first mode or a second mode. The buffer includes a first signal input terminal, a first signal output terminal, and a path circuit coupled between the first signal input terminal and the first signal output terminal. The path circuit has a voltage source terminal. In response to the buffer operating at the first mode, a first signal transmission path is formed in the path circuit and between the first signal input terminal and the first signal output terminal. The first signal transmission path is disconnected from the voltage source terminal.

Abstract: A level shifter includes a low-level adjustment circuit, a comparator circuit, and a high-level adjustment circuit. The low-level adjustment circuit pulls down a level of one between a first input node and a second input node to a first low supply voltage. The comparator outputs a one having higher level between the level of the first input node and a second low supply voltage to a first output node, wherein the second low supply voltage is higher than the first low supply voltage. The high-level adjustment circuit selectively adjusts the level of the first output node according to the level of the first input node and the level of the second input node to generate an output signal.

Abstract: A buffer circuit and a multiplexer using the buffer are provided. The buffer may selectively operate at a first mode or a second mode. The buffer includes a first signal input terminal, a first signal output terminal, and a path circuit coupled between the first signal input terminal and the first signal output terminal. The path circuit has a voltage source terminal. In response to the buffer operating at the first mode, a first signal transmission path is formed in the path circuit and between the first signal input terminal and the first signal output terminal. The first signal transmission path is disconnected from the voltage source terminal.

Abstract: A signal coupling circuit for generating an output signal according to an input signal is provided. The signal coupling circuit includes: a coupling capacitor, configured to generate a coupling signal according to the input signal; a clock generating circuit, configured to generate a clock and determine a duty cycle of the clock by the coupling capacitor; a discharge circuit, configured to intermittently discharge the coupling capacitor according to the duty cycle of the clock; and an output circuit, coupled to the coupling capacitor, for generating the output signal according to the coupling signal.

Abstract: A signal coupling circuit for generating an output signal according to an input signal is provided. The signal coupling circuit includes: a coupling capacitor, configured to generate a coupling signal according to the input signal; a clock generating circuit, configured to generate a clock and determine a duty cycle of the clock by the coupling capacitor; a discharge circuit, configured to intermittently discharge the coupling capacitor according to the duty cycle of the clock; and an output circuit, coupled to the coupling capacitor, for generating the output signal according to the coupling signal.