Patents by Inventor Chao-Han Chang

Chao-Han Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12009406
    Abstract: A semiconductor device includes a fin extending from a substrate, a gate stack over and along a sidewall of the fin, a spacer along a first sidewall of the gate stack and the sidewall of the fin, a dummy gate material along the sidewall of the fin, wherein the dummy gate material is between the spacer and the gate stack, and a first epitaxial source/drain region in the fin and adjacent the gate stack.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Publication number: 20240170543
    Abstract: A method of fabricating a semiconductor structure includes selective use of a cladding layer during the fabrication process to provide critical dimension uniformity. The cladding layer can be formed before forming a recess in an active channel structure or can be formed after filling a recess in an active channel structure with dielectric material. These techniques can be used in semiconductor structures such as gate-all-around (GAA) transistor structures implemented in an integrated circuit.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu KAO, Shih-Yao LIN, Chen-Ping CHEN, Chih-Han LIN, Ming-Ching CHANG, Chao-Cheng CHEN
  • Publication number: 20240170336
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. The semiconductor device includes a gate structure that comprises a lower portion and an upper portion, wherein the lower portion wraps around each of the plurality of semiconductor layers. The semiconductor device includes a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface. A portion of the bottom surface of the gate spacer and a top surface of a topmost one of the plurality of semiconductor layers form an angle that is less than 90 degrees.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Shih-Yao Lin, Chih-Chung Chiu
  • Publication number: 20240154025
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metal
    Type: Application
    Filed: January 10, 2024
    Publication date: May 9, 2024
    Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Patent number: 11979479
    Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.
    Type: Grant
    Filed: January 16, 2023
    Date of Patent: May 7, 2024
    Assignees: Chung Yuan Christian University, KGI Securities Co. Ltd.
    Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
  • Publication number: 20240137431
    Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.
    Type: Application
    Filed: January 16, 2023
    Publication date: April 25, 2024
    Applicants: Chung Yuan Christian University, KGI Securities Co. Ltd.
    Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Publication number: 20240096893
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao
  • Publication number: 20240020072
    Abstract: A method of displaying real-time images includes utilizing a document camera for capturing a raw image corresponding to a full range of a target document; detecting an object between the document camera and the target document; determining whether the object is an instruction from a user; and adjusting the raw image to be displayed on a display device according to the instruction.
    Type: Application
    Filed: November 7, 2022
    Publication date: January 18, 2024
    Applicant: Nextedge Labs, Inc.
    Inventor: Chao-Han Chang
  • Publication number: 20200389574
    Abstract: A USB camera includes a foldable base, a bracket, a support frame, and a camera module. The foldable base includes a primary plate and at least one secondary plate. The at least one secondary plate is configured to rotate with respect to the primary plate, such that the at least one secondary plate is selectively folded or expanded with respect to the primary plate. The bracket is disposed on the primary plate. The support frame is connected to the bracket. The camera module is connected to the support frame. The camera module has a USB port.
    Type: Application
    Filed: June 5, 2019
    Publication date: December 10, 2020
    Inventor: Chao-Han Chang
  • Publication number: 20100020226
    Abstract: The web camera of the present invention is used to capture the external images. The web camera of the present invention comprises a circuit control unit, a focal adjustment module, a focus adjustment button, an image capturing module, and a shutter button, wherein the focus adjustment module has an auto-focus mode and a fixed focus mode; the focus adjustment button is electrically connected to the focus adjustment module and the circuit control unit. The focus adjustment button is used to change the mode of the focus module to the auto-focus mode or to the fixed focus mode; the image capturing module is electrically connected to the circuit control unit, which is used to transform the external images into image signals; and the shutter button is electrically connected to the circuit control unit, which is used to send outward the image capturing signals.
    Type: Application
    Filed: November 20, 2008
    Publication date: January 28, 2010
    Applicant: IPEVO CORP.
    Inventor: Chao-Han Chang
  • Publication number: 20080240094
    Abstract: A method for transmitting an image file uses an image application program which can cooperate with a web-phone application program. The web-phone application program is responsible for transmitting the image file. After the web-phone application program on a receiver side receives the image file, the image file is displayed on the operating interface of the image application program on the receiver side.
    Type: Application
    Filed: May 18, 2007
    Publication date: October 2, 2008
    Applicant: PCHOME ONLINE INC.
    Inventor: Chao-Han Chang
  • Publication number: 20080094477
    Abstract: A webcam comprises: a main body, a wire control device, a control connecting line, and a connecting device. The main body comprises a digital image processing device to produce a digital image. The control connecting line is used to connect the wire control device and the main body. The wire control device has at least one operation button; the operation button could be a shooting button, a network visual controlling button, or an image adjusting button. The wire control device is used to let the user operate the button direction and control the digital image processing with the computer.
    Type: Application
    Filed: February 7, 2007
    Publication date: April 24, 2008
    Applicant: PCHOME ONLINE INC.
    Inventor: Chao-Han Chang
  • Patent number: D554102
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: October 30, 2007
    Assignee: PCHome Online Inc.
    Inventor: Chao-Han Chang
  • Patent number: D556179
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: November 27, 2007
    Assignee: PCHome Online, Inc.
    Inventor: Chao-Han Chang
  • Patent number: D570326
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: June 3, 2008
    Assignee: Pchome Online Inc.
    Inventor: Chao-Han Chang
  • Patent number: D582953
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: December 16, 2008
    Assignee: IPEVO Corp.
    Inventor: Chao-Han Chang
  • Patent number: D892900
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 11, 2020
    Assignee: Nextedge Labs, Inc.
    Inventor: Chao-Han Chang
  • Patent number: D1013017
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: January 30, 2024
    Assignee: Nextedge Labs, Inc.
    Inventor: Chao-Han Chang