Patents by Inventor Chao-Hsin Lu
Chao-Hsin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Patent number: 11444634Abstract: A time-interleaved noise-shaping successive-approximation analog-to-digital converter (TI NS-SAR ADC) is shown. A first successive-approximation channel has a first set of successive-approximation registers, and a first coarse comparator operative to coarsely adjust the first set of successive-approximation registers. A second successive-approximation channel has a second set of successive-approximation registers, and a second coarse comparator operative to coarsely adjust the second set of successive-approximation registers. A fine comparator is provided to finely adjust the first set of successive-approximation registers and the second set of successive-approximation registers alternately. A noise-shaping circuit is provided to sample residues of the first and second successive-approximation channels for the fine comparator to finely adjust the first and second sets of successive-approximation registers.Type: GrantFiled: May 10, 2021Date of Patent: September 13, 2022Assignee: MEDIATEK INC.Inventors: Chin-Yu Lin, Ying-Zu Lin, Chih-Hou Tsai, Chao-Hsin Lu
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Publication number: 20210266006Abstract: A time-interleaved noise-shaping successive-approximation analog-to-digital converter (TI NS-SAR ADC) is shown. A first successive-approximation channel has a first set of successive-approximation registers, and a first coarse comparator operative to coarsely adjust the first set of successive-approximation registers. A second successive-approximation channel has a second set of successive-approximation registers, and a second coarse comparator operative to coarsely adjust the second set of successive-approximation registers. A fine comparator is provided to finely adjust the first set of successive-approximation registers and the second set of successive-approximation registers alternately. A noise-shaping circuit is provided to sample residues of the first and second successive-approximation channels for the fine comparator to finely adjust the first and second sets of successive-approximation registers.Type: ApplicationFiled: May 10, 2021Publication date: August 26, 2021Inventors: Chin-Yu LIN, Ying-Zu LIN, Chih-Hou TSAI, Chao-Hsin LU
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Patent number: 11043958Abstract: A time-interleaved noise-shaping successive-approximation analog-to-digital converter (TI NS-SAR ADC) is shown. A first successive-approximation channel has a first set of successive-approximation registers, and a first coarse comparator operative to coarsely adjust the first set of successive-approximation registers. A second successive-approximation channel has a second set of successive-approximation registers, and a second coarse comparator operative to coarsely adjust the second set of successive-approximation registers. A fine comparator is provided to finely adjust the first set of successive-approximation registers and the second set of successive-approximation registers alternately. A noise-shaping circuit is provided to sample residues of the first and second successive-approximation channels for the fine comparator to finely adjust the first and second sets of successive-approximation registers.Type: GrantFiled: August 11, 2020Date of Patent: June 22, 2021Assignee: MEDIATEK INC.Inventors: Chin-Yu Lin, Ying-Zu Lin, Chih-Hou Tsai, Chao-Hsin Lu
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Publication number: 20210119637Abstract: A time-interleaved noise-shaping successive-approximation analog-to-digital converter (TI NS-SAR ADC) is shown. A first successive-approximation channel has a first set of successive-approximation registers, and a first coarse comparator operative to coarsely adjust the first set of successive-approximation registers. A second successive-approximation channel has a second set of successive-approximation registers, and a second coarse comparator operative to coarsely adjust the second set of successive-approximation registers. A fine comparator is provided to finely adjust the first set of successive-approximation registers and the second set of successive-approximation registers alternately. A noise-shaping circuit is provided to sample residues of the first and second successive-approximation channels for the fine comparator to finely adjust the first and second sets of successive-approximation registers.Type: ApplicationFiled: August 11, 2020Publication date: April 22, 2021Inventors: Chin-Yu LIN, Ying-Zu LIN, Chih-Hou TSAI, Chao-Hsin LU
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Patent number: 10840932Abstract: A noise-shaping successive approximation analog-to-digital converter (NS-SAR ADC) using a passive noise-shaping technique with 1-input-pair SAR comparator is introduced. A residue sampling and integration circuit is coupled between a DAC and the comparator, for sampling a residue voltage generated by the DAC and charge-sharing of the sampled residue voltage. A first integral capacitor is coupled between a first input terminal of a comparator and a first output terminal of a DAC. After a first residue capacitor samples a residue generated by the DAC, the first residue capacitor is coupled to the first integral capacitor for charge-sharing of the residue voltage.Type: GrantFiled: August 13, 2019Date of Patent: November 17, 2020Assignee: MEDIATEK INC.Inventors: Ying-Zu Lin, Chin-Yu Lin, Chih-Hou Tsai, Shan-Chih Tsou, Chao-Hsin Lu
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Publication number: 20200119744Abstract: A noise-shaping successive approximation analog-to-digital converter (NS-SAR ADC) using a passive noise-shaping technique with 1-input-pair SAR comparator is introduced. A residue sampling and integration circuit is coupled between a DAC and the comparator, for sampling a residue voltage generated by the DAC and charge-sharing of the sampled residue voltage. A first integral capacitor is coupled between a first input terminal of a comparator and a first output terminal of a DAC. After a first residue capacitor samples a residue generated by the DAC, the first residue capacitor is coupled to the first integral capacitor for charge-sharing of the residue voltage.Type: ApplicationFiled: August 13, 2019Publication date: April 16, 2020Inventors: Ying-Zu LIN, Chin-Yu LIN, Chih-Hou TSAI, Shan-Chih TSOU, Chao-Hsin LU
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Patent number: 10177216Abstract: A metal-oxide-metal (MOM) capacitor is provided in the present invention. The MOM capacitor includes a capacitor element, wherein the capacitor element includes a first electrode and a second electrode. A projection of the first electrode includes a closed pattern in the vertical projection direction. A projection of the second electrode is surrounded by the closed pattern of the projection of the first electrode in the vertical projection direction.Type: GrantFiled: May 2, 2017Date of Patent: January 8, 2019Assignee: MEDIATEK INC.Inventors: Chih-Hou Tsai, Wei-Hao Tsai, Rong-Sing Chu, Ying-Zu Lin, Chao-Hsin Lu
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Publication number: 20170352719Abstract: A metal-oxide-metal (MOM) capacitor is provided in the present invention. The MOM capacitor includes a capacitor element, wherein the capacitor element includes a first electrode and a second electrode. A projection of the first electrode includes a closed pattern in the vertical projection direction. A projection of the second electrode is surrounded by the closed pattern of the projection of the first electrode in the vertical projection direction.Type: ApplicationFiled: May 2, 2017Publication date: December 7, 2017Inventors: Chih-Hou Tsai, Wei-Hao Tsai, Rong-Sing Chu, Ying-Zu Lin, Chao-Hsin Lu
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Patent number: 9263993Abstract: A low pass filter includes a first amplifier stage and a second amplifier stage. The first amplifier stage includes a differential operational amplifier, wherein the first amplifier stage is arranged to process a differential input signal to generate a differential intermediate signal, the differential input signal having a first input signal and a second input signal, and the differential intermediate signal having a first intermediate signal and a second intermediate signal. The second amplifier stage has no common-mode feedback and is arranged to process the differential intermediate signal to generate a differential output signal, wherein the differential output signal has a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal. Since the noisy common-mode feedback is removed from the second amplifier stage, the overall common-mode noise of the low pass filter can be decreased.Type: GrantFiled: April 22, 2014Date of Patent: February 16, 2016Assignee: MEDIATEK INC.Inventors: Tzu-Hsuin Peng, Chih-Hong Lou, Chao-Hsin Lu, Chi-Yun Wang, Chih-Jung Chen
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Patent number: 9172410Abstract: A transmitter includes a first wireless communication module, a second wireless communication module, a multiplexer, a digital-to-analog converter and a filter. The multiplexer selectively outputs a first digital signal derived from a digital output of the first wireless communication module or a second digital signal derived from a digital output of the second wireless communication module as a selected output. The digital-to-analog converter converts the selected output into an analog signal. The filter processes the analog signal and includes an adjustable resistive element. When the multiplexer selects the first digital signal as the selected output, the adjustable resistive element is adjusted to have a first resistance value such that the filter has a first bandwidth. When the multiplexer selects the second digital signal as the selected output, the adjustable resistive element is adjusted to have a second resistance value such that the filter has a second bandwidth.Type: GrantFiled: January 15, 2014Date of Patent: October 27, 2015Assignee: MEDIATEK INC.Inventors: Chao-Hsin Lu, Chih-Jung Chen
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Publication number: 20150303880Abstract: A low pass filter includes a first amplifier stage and a second amplifier stage. The first amplifier stage includes a differential operational amplifier, wherein the first amplifier stage is arranged to process a differential input signal to generate a differential intermediate signal, the differential input signal having a first input signal and a second input signal, and the differential intermediate signal having a first intermediate signal and a second intermediate signal. The second amplifier stage has no common-mode feedback and is arranged to process the differential intermediate signal to generate a differential output signal, wherein the differential output signal has a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal. Since the noisy common-mode feedback is removed from the second amplifier stage, the overall common-mode noise of the low pass filter can be decreased.Type: ApplicationFiled: April 22, 2014Publication date: October 22, 2015Applicant: MEDIATEK INC.Inventors: Tzu-Hsuin Peng, Chih-Hong Lou, Chao-Hsin Lu, Chi-Yun Wang, Chih-Jung Chen
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Publication number: 20150200693Abstract: A transmitter includes a first wireless communication module, a second wireless communication module, a multiplexer, a digital-to-analog converter and a filter. The multiplexer selectively outputs a first digital signal derived from a digital output of the first wireless communication module or a second digital signal derived from a digital output of the second wireless communication module as a selected output. The digital-to-analog converter converts the selected output into an analog signal. The filter processes the analog signal and includes an adjustable resistive element. When the multiplexer selects the first digital signal as the selected output, the adjustable resistive element is adjusted to have a first resistance value such that the filter has a first bandwidth. When the multiplexer selects the second digital signal as the selected output, the adjustable resistive element is adjusted to have a second resistance value such that the filter has a second bandwidth.Type: ApplicationFiled: January 15, 2014Publication date: July 16, 2015Applicant: MEDIATEK INC.Inventors: Chao-Hsin Lu, Chih-Jung Chen
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Patent number: 8669896Abstract: A method of controlling a successive-comparing-register analog-to-digital convertor (SAR ADC) is provided. Based upon the method, the SAR ADC receives a conversion clock that controls a conversion rate of the SAR ADC.Type: GrantFiled: June 11, 2012Date of Patent: March 11, 2014Assignee: Mediatek Inc.Inventors: Jen-Che Tsai, Chao-Hsin Lu
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Patent number: 8549212Abstract: The invention provides a flash storage device. In one embodiment, the flash storage device comprises a flash memory and a controller. The flash memory comprises a plurality of blocks, wherein each of the plurality of blocks comprises a plurality of pages for storing data, and each of the plurality of pages has a physical address. The controller divides a plurality of logical addresses into a plurality of logical address ranges, records a plurality of partial link tables respectively storing a mapping relationship between logical addresses of a corresponding logical address range and corresponding physical addresses, stores the partial link tables in the flash memory, combines the partial link tables to obtain a link table, and converts logical addresses sent by a host to physical addresses according to the link table.Type: GrantFiled: December 18, 2009Date of Patent: October 1, 2013Assignee: Silicon Motion, Inc.Inventor: Chao-Hsin Lu
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Publication number: 20130099953Abstract: A method of controlling a successive-comparing-register analog-to-digital convertor (SAR ADC) is provided. Based upon the method, the SAR ADC receives a conversion clock that controls a conversion rate of the SAR ADC.Type: ApplicationFiled: June 11, 2012Publication date: April 25, 2013Inventors: Jen-Che Tsai, Chao-Hsin Lu
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Patent number: 8290065Abstract: The invention discloses an image processing system comprising a video source system, a transmission medium, and a television system. The image processing systems of the video source system and the television system are equipped with an additional digital-to-analog converter and an additional analog-to-digital converter.Type: GrantFiled: July 25, 2007Date of Patent: October 16, 2012Assignee: Realtek Semiconductor Corp.Inventors: Jui-Yuan Tsai, Chao-Hsin Lu
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Patent number: 7995979Abstract: A wireless receiver with automatic gain control and a method for automatic gain control of a receiving circuit utilized in a wireless receiver are provided. The receiving circuit includes a programmable gain amplifier and a low noise amplifier, and the method includes: comparing a gain code of the programmable gain amplifier with a predetermined code range, wherein the gain code is determined by a frequency signal received through the low noise amplifier; and adjusting a gain of the low noise amplifier when the gain code is out of the predetermined code range.Type: GrantFiled: March 4, 2008Date of Patent: August 9, 2011Assignee: Mediatek Inc.Inventors: Chao-Hsin Lu, Chang-Fu Kuo
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Patent number: 7933360Abstract: A method to assess signal transmission quality and the adjust method thereof are proposed. First, different time points of a control signal at a receiving end are acquired and the number of signal transitions in a predetermined time interval is counted. Next, the number of signal transitions is recorded and compared to a reference value to obtain a comparison result. The quality of the control signal is then determined based on the comparison result. The parameter setting of the receiving end is adjusted according to the quality of the control signal received by the receiving end to get a better performance setting.Type: GrantFiled: September 15, 2005Date of Patent: April 26, 2011Assignee: Realtek Semiconductor Corp.Inventors: Yu-Pin Chou, Chao-Hsin Lu, Hsu-Jung Tung
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Patent number: 7903046Abstract: A transmitter includes an output module coupled to an output port for outputting an output signal to the output port according to a detection signal, and a detect module for detecting the output port to generate the detect signal.Type: GrantFiled: April 12, 2005Date of Patent: March 8, 2011Assignee: Realtek Semiconductor Corp.Inventor: Chao-Hsin Lu