Patents by Inventor Chao-Kuei Chung
Chao-Kuei Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9728250Abstract: A memory write tracking device is applied to a data write operation to at least a memory cell row. The memory write tracking device includes a dummy cell row, a variation sensor, a judging device and a word-line pulse generator. The dummy cell row includes a plurality of dummy memory cells for simulating the data write operation to the memory cell row. The variation sensor senses a set of circuit parameters for write ability of the memory cell row. The judging device determines a threshold number according to a change of the set of circuit parameters and sends an enabling signal when a threshold number of the dummy memory cells have been successfully written with the data. The word-line pulse generator determines a write cycle of the data write operation in response to the enabling signal. An associated memory write tracking method is also provided.Type: GrantFiled: October 17, 2016Date of Patent: August 8, 2017Assignee: M31 Technology CorporationInventors: Chao-Kuei Chung, Nan-Chun Lien
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Publication number: 20170110183Abstract: A memory write tracking device is applied to a data write operation to at least a memory cell row. The memory write tracking device includes a dummy cell row, a variation sensor, a judging device and a word-line pulse generator. The dummy cell row includes a plurality of dummy memory cells for simulating the data write operation to the memory cell row. The variation sensor senses a set of circuit parameters for write ability of the memory cell row. The judging device determines a threshold number according to a change of the set of circuit parameters and sends an enabling signal when a threshold number of the dummy memory cells have been successfully written with the data. The word-line pulse generator determines a write cycle of the data write operation in response to the enabling signal. An associated memory write tracking method is also provided.Type: ApplicationFiled: October 17, 2016Publication date: April 20, 2017Inventors: Chao-Kuei CHUNG, Nan-Chun LIEN
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Patent number: 9378808Abstract: A pulse width modulation device for use in an N-ports random access memory having a plurality of word line sets, wherein a specified word line set comprises N port word lines. The pulse width modulation device comprises a status detecting device and a clock signal generator. The status detecting device is coupled to the N port word lines having a first and a second port word line, and outputs a first control signal when both the voltage values of the first and second port word lines are within a first level range. The clock signal generator is coupled to the status detecting device and the specified word line set, and generates and outputs a first clock signal to the specified word line set, wherein a duration of the first clock signal kept within the first level range is variable in response to the first control signal.Type: GrantFiled: January 23, 2015Date of Patent: June 28, 2016Assignee: M31 Technology CorporationInventors: Nan-Chun Lien, Chen-Wei Lin, Chao-Kuei Chung, Li-Wei Chu, Yuh-Jiun Lin, Yu-Wei Yeh, Wei-Chiang Shih
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Publication number: 20160111144Abstract: A pulse width modulation device for use in an N-ports random access memory having a plurality of word line sets, wherein a specified word line set comprises N port word lines. The pulse width modulation device comprises a status detecting device and a clock signal generator. The status detecting device is coupled to the N port word lines having a first and a second port word line, and outputs a first control signal when both the voltage values of the first and second port word lines are within a first level range. The clock signal generator is coupled to the status detecting device and the specified word line set, and generates and outputs a first clock signal to the specified word line set, wherein a duration of the first clock signal kept within the first level range is variable in response to the first control signal.Type: ApplicationFiled: January 23, 2015Publication date: April 21, 2016Inventors: Nan-Chun LIEN, Chen-Wei Lin, Chao-Kuei CHUNG, Li-Wei CHU, Yuh-Jiun LIN, Yu-Wei YEH, Wei-Chiang SHIH
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Patent number: 9275726Abstract: A static memory cell is provided. The static memory cell includes a data latch circuit and a voltage provider. The data latch circuit is configured to store a bit data. The data latch circuit has a first inverter and a second inverter, and the first inverter and the second inverter are coupled to each other. The first inverter and the second inverter respectively receive a first voltage and a second voltage as power voltages. The voltage provider provides the first voltage and the second voltage to the data latch circuit. When the bit data is written to the data latch circuit, the voltage provider adjusts a voltage value of one of the first and second voltages according to the bit data.Type: GrantFiled: March 7, 2014Date of Patent: March 1, 2016Assignee: Faraday Technology Corp.Inventors: Ching-Te Chuang, Chih-Hao Chang, Chao-Kuei Chung, Chien-Yu Lu, Shyh-Jye Jou, Ming-Hsien Tu
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Publication number: 20150162077Abstract: A static memory cell is provided. The static memory cell includes a data latch circuit and a voltage provider. The data latch circuit is configured to store a bit data. The data latch circuit has a first inverter and a second inverter, and the first inverter and the second inverter are coupled to each other. The first inverter and the second inverter respectively receive a first voltage and a second voltage as power voltages. The voltage provider provides the first voltage and the second voltage to the data latch circuit. When the bit data is written to the data latch circuit, the voltage provider adjusts a voltage value of one of the first and second voltages according to the bit data.Type: ApplicationFiled: March 7, 2014Publication date: June 11, 2015Applicants: NATIONAL CHIAO TUNG UNIVERSITY, FARADAY TECHNOLOGY CORP.Inventors: Ching-Te Chuang, Chih-Hao Chang, Chao-Kuei Chung, Chien-Yu Lu, Shyh-Jye Jou, Ming-Hsien Tu
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Patent number: 7840716Abstract: A communication method for storage device on the basis of file access is provided. When a storage controller is added with a nonstandard control function, a command file and a response file are virtually produced in the memory as the communicating interface with an application program. The virtual files can then be read and written using the standard storage control protocol. This avoids modifying the communicating interface between the driver program and the application program for the newly added nonstandard control protocol.Type: GrantFiled: November 15, 2005Date of Patent: November 23, 2010Assignee: Etrovision TechnologyInventors: Fan-Sheng Lin, Chao-Kuei Chung
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Publication number: 20070050418Abstract: A communication method for storage device on the basis of file access is provided. When a storage controller is added with a nonstandard control function, a command file and a response file are virtually produced in the memory as the communicating interface with an application program. The virtual files can then be read and written using the standard storage control protocol. This avoids modifying the communicating interface between the driver program and the application program for the newly added nonstandard control protocol.Type: ApplicationFiled: November 15, 2005Publication date: March 1, 2007Inventors: Fan-Sheng Lin, Chao-Kuei Chung
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Publication number: 20050289521Abstract: A method for controlling an embedded system device via standard file I/O from a host computer linked to the embedded system device is disclosed. In a preferred embodiment, the embedded system device and the host computer is connected through USB. The embedded system device is controlled via management of a system control file through a file I/O interface displaying in the host computer. The system control file in the embedded system device can be read, stored, modified and updated through the file I/O interface.Type: ApplicationFiled: August 30, 2004Publication date: December 29, 2005Inventors: Fan-Sheng Lin, Chao-Kuei Chung